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[209.85.217.43]) by smtp.gmail.com with ESMTPSA id r76sm450672vsa.12.2018.10.03.10.45.14 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 03 Oct 2018 10:45:14 -0700 (PDT) Received: by mail-vs1-f43.google.com with SMTP id z130-v6so3747428vsc.7 for ; Wed, 03 Oct 2018 10:45:14 -0700 (PDT) X-Received: by 2002:a67:83d5:: with SMTP id f204-v6mr999348vsd.6.1538588713891; Wed, 03 Oct 2018 10:45:13 -0700 (PDT) MIME-Version: 1.0 References: <1538569430-32374-1-git-send-email-alokc@codeaurora.org> In-Reply-To: <1538569430-32374-1-git-send-email-alokc@codeaurora.org> From: Doug Anderson Date: Wed, 3 Oct 2018 10:45:02 -0700 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH] soc: qcom: Add irq clear handling during SE init To: alokc@codeaurora.org Cc: Stephen Boyd , Dilip Kota , Andy Gross , David Brown , linux-arm-msm , "open list:ARM/QUALCOMM SUPPORT" , LKML Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi, On Wed, Oct 3, 2018 at 5:24 AM Alok Chauhan wrote: > > when the kernel inits a SE, its quite possible we have pending interrupts > from bootloaders which did not handle/clear them. So do this in kernel at > the SE init, to avoid some of it causing bad behavior, while at it also > club all the register writes needed to clear the se irqs into a function > to avoid repeating it over. > > Signed-off-by: Alok Chauhan > --- > drivers/soc/qcom/qcom-geni-se.c | 25 +++++++++++++------------ > 1 file changed, 13 insertions(+), 12 deletions(-) This looks fine to me. To clarify this doesn't fix any known issues and it just fixes the theoretical case where somehow a IRQ was sitting around (maybe left by the firmware) so we want to make really certain that we start with a clean state at init time. Reviewed-by: Douglas Anderson