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[209.85.222.41]) by smtp.gmail.com with ESMTPSA id d133-v6sm507608vkf.43.2018.10.03.10.46.35 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 03 Oct 2018 10:46:35 -0700 (PDT) Received: by mail-ua1-f41.google.com with SMTP id c10so881086uao.12 for ; Wed, 03 Oct 2018 10:46:35 -0700 (PDT) X-Received: by 2002:a9f:344d:: with SMTP id s13mr1054572uab.27.1538588795380; Wed, 03 Oct 2018 10:46:35 -0700 (PDT) MIME-Version: 1.0 References: <1538574265-30235-1-git-send-email-alokc@codeaurora.org> <1538574265-30235-4-git-send-email-alokc@codeaurora.org> In-Reply-To: <1538574265-30235-4-git-send-email-alokc@codeaurora.org> From: Doug Anderson Date: Wed, 3 Oct 2018 10:46:24 -0700 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH V5 3/3] spi: spi-geni-qcom: Add SPI driver support for GENI based QUP To: alokc@codeaurora.org Cc: Stephen Boyd , Mark Brown , Matthias Kaehlcke , LKML , linux-spi , linux-arm-msm , Girish Mahadevan , Dilip Kota Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi, On Wed, Oct 3, 2018 at 6:45 AM Alok Chauhan wrote: > +static irqreturn_t geni_spi_isr(int irq, void *data) > +{ > + struct spi_master *spi = data; > + struct spi_geni_master *mas = spi_master_get_devdata(spi); > + struct geni_se *se = &mas->se; > + u32 m_irq; > + unsigned long flags; > + irqreturn_t ret = IRQ_HANDLED; > + > + if (mas->cur_mcmd == CMD_NONE) > + return IRQ_NONE; > + > + spin_lock_irqsave(&mas->lock, flags); > + m_irq = readl(se->base + SE_GENI_M_IRQ_STATUS); > + > + if ((m_irq & M_RX_FIFO_WATERMARK_EN) || (m_irq & M_RX_FIFO_LAST_EN)) > + geni_spi_handle_rx(mas); > + > + if (m_irq & M_TX_FIFO_WATERMARK_EN) > + geni_spi_handle_tx(mas); > + > + if (m_irq & M_CMD_DONE_EN) { > + if (mas->cur_mcmd == CMD_XFER) > + spi_finalize_current_transfer(spi); > + else if (mas->cur_mcmd == CMD_CS) > + complete(&mas->xfer_done); > + mas->cur_mcmd = CMD_NONE; > + /* > + * If this happens, then a CMD_DONE came before all the Tx > + * buffer bytes were sent out. This is unusual, log this > + * condition and disable the WM interrupt to prevent the > + * system from stalling due an interrupt storm. > + * If this happens when all Rx bytes haven't been received, log > + * the condition. > + * The only known time this can happen is if bits_per_word != 8 > + * and some registers that expect xfer lengths in num spi_words > + * weren't written correctly. > + */ > + if (mas->tx_rem_bytes) { > + writel(0, se->base + SE_GENI_TX_WATERMARK_REG); > + dev_err(mas->dev, "Premature done. tx_rem = %d bpw%d\n", > + mas->tx_rem_bytes, mas->cur_bits_per_word); > + } > + if (mas->rx_rem_bytes) > + dev_err(mas->dev, "Premature done. rx_rem = %d bpw%d\n", > + mas->rx_rem_bytes, mas->cur_bits_per_word); > + } > + > + if ((m_irq & M_CMD_CANCEL_EN) || (m_irq & M_CMD_ABORT_EN)) { > + mas->cur_mcmd = CMD_NONE; > + complete(&mas->xfer_done); > + } > + > + writel(m_irq, se->base + SE_GENI_M_IRQ_CLEAR); > + spin_unlock_irqrestore(&mas->lock, flags); > + return ret; nit: you no longer need the "ret" variable. Just return IRQ_HANDLED here and remove the "ret" local variable from this function. It'd be nice if you put a blank line before the return too. I'm not convinced it's worth spinning the patch to fix that one nit, but if you spin it for some other reason please fix it. I believe this fixes all outstanding feedback that I'm aware of. Thus: Reviewed-by: Douglas Anderson Tested-by: Douglas Anderson -Doug