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[122.223.50.245]) by smtp.gmail.com with ESMTPSA id m15-v6sm11925440pfk.149.2018.10.04.03.30.36 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 04 Oct 2018 03:30:39 -0700 (PDT) Date: Thu, 4 Oct 2018 19:30:28 +0900 From: William Breathitt Gray To: Andy Shevchenko Cc: Rasmus Villemoes , linus.walleij@linaro.org, akpm@linux-foundation.org, linux-gpio@vger.kernel.org, linux-arch@vger.kernel.org, linux-kernel@vger.kernel.org, Arnd Bergmann Subject: Re: [RESEND PATCH v4 1/8] bitops: Introduce the for_each_set_clump macro Message-ID: <20181004103028.GA4779@icarus> References: <40ecad49-2797-0d30-b52d-a2e6838dc1ab@rasmusvillemoes.dk> <20181002082142.GC15943@smile.fi.intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: <20181002082142.GC15943@smile.fi.intel.com> User-Agent: Mutt/1.10.1 (2018-07-13) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, Oct 02, 2018 at 11:21:42AM +0300, Andy Shevchenko wrote: > On Tue, Oct 02, 2018 at 09:42:48AM +0200, Rasmus Villemoes wrote: > > On 2018-10-02 03:13, William Breathitt Gray wrote: > > > The cover letter says > > > > The clump_size argument can be an arbitrary number of bits and is not > > required to be a multiple of 2. > > > > by which I assume you mean "power of 2", but either way, the above code > > does not seem to take into account the case where bits_offset + > > clump_size straddles a word boundary, so it wouldn't work for a > > clump_size that does not divide BITS_PER_LONG. > > E.g. 3 bits in a clump? Hmm... > > Why would we need that? I mean some real use case? GPIOs in hardware may be routed to devices logically in groups of I/O lines, yet must still be accessed via the word-sized registers on the operating machine. For example, suppose a GPIO card is used to control a set of shower devices. The card supports 4 shower devices, each device controlled by 3 lines of I/O: enable, hot-cold selection, high-low pressure selection. In this case, a operating machine would still have to access the GPIO lines via the I/O registers (e.g. 8-bit port I/O); but with a macro handling a clump size of 3-bits, we can loop logically by each shower device which is much simpler from a driver perspective. William Breathitt Gray