Received: by 2002:ac0:a582:0:0:0:0:0 with SMTP id m2-v6csp915700imm; Thu, 4 Oct 2018 05:33:50 -0700 (PDT) X-Google-Smtp-Source: ACcGV63IWOXBVgnFEhvSkqtmOfztiIu4IcI9yHgIP4BEOSSDGo3QOJkSmGJWanX1jNEsq71zjAGN X-Received: by 2002:a62:6b85:: with SMTP id g127-v6mr6749306pfc.204.1538656430906; Thu, 04 Oct 2018 05:33:50 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1538656430; cv=none; d=google.com; s=arc-20160816; b=ZV/3ypFgowVjKF7lO7HyKBeS8TJ4vE9klNt+o5ta/tur9Ict980q+UT9qH/tFe0fxA wXTffHseKh6MQp2P3k7AR4quLdHko/+vNM21B5XEM/91mhv0S2cxPhLREju24L4Kki4X szlujPTouq6fnOm42Da35WxyA8wQ1hRC1BsMcH1QrhH6rrg6csSx3xAuzV37O5NNXfuM 6Q+Q7h08x4R0jcwWboqM/7dAkyQ5Z5wojiwBWY9ZhOyr2hwyHoftDSdlY/nwHPpRx+Ns mEaHpuxbtw5QApJrcQhuyLmMPkOQc97S4W6axWdUZwaf/G0a4okQXiDS7pv3tFpSGK3J 3l3A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from; bh=zEUFGaPEYuRP0kmPAX5D1ZDKIQsvZTWKC+qiOLp3oS0=; b=clC8V+hfF5GYqj1ss89VVkKgDC68smvWij4MEbhLdhZe6/NCxeHMRXOoxk/ddHxXSC 5vpSIPZ/MddFQ/JPuiQ7T3JdT+C/h3Z3oRw6xyLLkb8/Q9e0g6KDQf7MdmAgaSZWwYqv lsQSGB+vVoKlOjABn4r3lPW5j535uHuB6VUflKQ8gZmGvC01qkCYJ+SUAgHSsG4mFeYF u1DLVh/x1Ah+GyVX8NL/bYNyf+p7/2I1XzSfMHAX294lZaO/34pUqs1SoGrwXEJI+9Xp ky5PPQK0/JRr5K1uERTH87U0Att1t12Revs8ebTm7BlCIyx+2ZwpVX6DDQt4RRBbXxbp ociQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id w5-v6si5117620pgi.254.2018.10.04.05.33.34; Thu, 04 Oct 2018 05:33:50 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727866AbeJDTZG (ORCPT + 99 others); Thu, 4 Oct 2018 15:25:06 -0400 Received: from hermes.aosc.io ([199.195.250.187]:44105 "EHLO hermes.aosc.io" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727407AbeJDTZG (ORCPT ); Thu, 4 Oct 2018 15:25:06 -0400 Received: from localhost (localhost [127.0.0.1]) (Authenticated sender: icenowy@aosc.io) by hermes.aosc.io (Postfix) with ESMTPSA id 5847565E0A; Thu, 4 Oct 2018 12:31:57 +0000 (UTC) From: Icenowy Zheng To: Rob Herring , Maxime Ripard , Chen-Yu Tsai , Kishon Vijay Abraham I Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-sunxi@googlegroups.com, Icenowy Zheng Subject: [PATCH v4 09/10] arm64: allwinner: dts: h6: add USB3 device nodes Date: Thu, 4 Oct 2018 20:28:54 +0800 Message-Id: <20181004122855.22981-10-icenowy@aosc.io> In-Reply-To: <20181004122855.22981-1-icenowy@aosc.io> References: <20181004122855.22981-1-icenowy@aosc.io> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Allwinner H6 SoC features USB3 functionality, with a DWC3 controller and a custom PHY. Add device tree nodes for them. Signed-off-by: Icenowy Zheng Reviewed-by: Chen-Yu Tsai --- No changes in v4. Changes in v3: - Changed the dwc3 clock according to the user manual. - Added Chen-Yu's Review tag. arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 32 ++++++++++++++++++++ 1 file changed, 32 insertions(+) diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi index 3d60af6cb3ae..0a8b4845c0df 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi +++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi @@ -313,6 +313,38 @@ status = "disabled"; }; + dwc3: dwc3@5200000 { + compatible = "snps,dwc3"; + reg = <0x05200000 0x10000>; + interrupts = ; + clocks = <&ccu CLK_BUS_XHCI>, + <&ccu CLK_BUS_XHCI>, + <&osc32k>; + clock-names = "ref", "bus_early", "suspend"; + resets = <&ccu RST_BUS_XHCI>; + /* + * The datasheet of the chip doesn't declare the + * peripheral function, and there's no boards known + * to have a USB Type-B port routed to the port. + * In addition, no one has tested the peripheral + * function yet. + * So set the dr_mode to "host" in the DTSI file. + */ + dr_mode = "host"; + phys = <&usb3phy>; + phy-names = "usb3-phy"; + status = "disabled"; + }; + + usb3phy: phy@5210000 { + compatible = "allwinner,sun50i-h6-usb3-phy"; + reg = <0x5210000 0x10000>; + clocks = <&ccu CLK_USB_PHY1>; + resets = <&ccu RST_USB_PHY1>; + #phy-cells = <0>; + status = "disabled"; + }; + ehci3: usb@5311000 { compatible = "allwinner,sun50i-h6-ehci", "generic-ehci"; reg = <0x05311000 0x100>; -- 2.18.0