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[209.132.180.67]) by mx.google.com with ESMTP id x5-v6si438822pgq.590.2018.10.04.07.25.07; Thu, 04 Oct 2018 07:25:23 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727444AbeJDVSN (ORCPT + 99 others); Thu, 4 Oct 2018 17:18:13 -0400 Received: from 59-120-53-16.HINET-IP.hinet.net ([59.120.53.16]:64436 "EHLO ATCSQR.andestech.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1727322AbeJDVSN (ORCPT ); Thu, 4 Oct 2018 17:18:13 -0400 X-Greylist: delayed 1225 seconds by postgrey-1.27 at vger.kernel.org; Thu, 04 Oct 2018 17:18:11 EDT Received: from ATCSQR.andestech.com (localhost [127.0.0.2] (may be forged)) by ATCSQR.andestech.com with ESMTP id w94E7H0u057543 for ; Thu, 4 Oct 2018 22:07:17 +0800 (GMT-8) (envelope-from alankao@andestech.com) Received: from mail.andestech.com (atcpcs16.andestech.com [10.0.1.222]) by ATCSQR.andestech.com with ESMTP id w94E6k36057260; Thu, 4 Oct 2018 22:06:48 +0800 (GMT-8) (envelope-from alankao@andestech.com) Received: from andestech.com (10.0.15.65) by ATCPCS16.andestech.com (10.0.1.222) with Microsoft SMTP Server id 14.3.123.3; Thu, 4 Oct 2018 13:30:42 +0800 Date: Thu, 4 Oct 2018 13:30:42 +0800 From: Alan Kao To: Palmer Dabbelt CC: , , , Christoph Hellwig , Andrew Waterman , Arnd Bergmann , Darius Rad , , , , Subject: Re: [PATCH v7 0/5] riscv: Add support to no-FPU systems Message-ID: <20181004053042.GA31734@andestech.com> References: <1535332075-5727-1-git-send-email-alankao@andestech.com> MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.5.24 (2015-08-30) X-Originating-IP: [10.0.15.65] X-DNSRBL: X-MAIL: ATCSQR.andestech.com w94E6k36057260 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, Sep 06, 2018 at 02:45:04AM -0700, Palmer Dabbelt wrote: > On Sun, 26 Aug 2018 18:07:50 PDT (-0700), alankao@andestech.com wrote: > >This patchset adds an option, CONFIG_FPU, to enable/disable floating- > >point procedures. > > > >Kernel's new behavior will be as follows: > > > >* with CONFIG_FPU=y > > All FPU codes are reserved. If no FPU is found during booting, a > > global flag will be set, and those functions will be bypassed with > > condition check to that flag. > > > >* with CONFIG_FPU=n > > No floating-point instructions in kernel and all related settings > > are excluded. > > > >Changes in v7: > > - Remove "fd" attribute from KBUILD_CFLAGS. > > > >Changes in v6 (PATCH 0005 only): > > - Make the flag checking neater. > > > >Changes in v5: > > - Invert the polarity of checking flag from no_fpu to has_fpu. > > > >Changes in v4: > > - Append a new patch to detect existence of FPU and followups. > > - Add SPDX header to newly created fpu.S. > > - Fix a build error, sorry for that. > > - Fix wording, style, etc. > > > >Changes in v3: > > - Refactor the whole patch into independent ones. > > > >Changes in v2: > > - Various code cleanups and style fixes. > > > > > >Alan Kao (5): > > Extract FPU context operations from entry.S > > Refactor FPU code in signal setup/return procedures > > Cleanup ISA string setting > > Allow to disable FPU support > > Auto-detect whether a FPU exists > > > > arch/riscv/Kconfig | 9 +++ > > arch/riscv/Makefile | 19 +++--- > > arch/riscv/include/asm/switch_to.h | 12 +++- > > arch/riscv/kernel/Makefile | 1 + > > arch/riscv/kernel/cpufeature.c | 8 +++ > > arch/riscv/kernel/entry.S | 87 ----------------------- > > arch/riscv/kernel/fpu.S | 106 +++++++++++++++++++++++++++++ > > arch/riscv/kernel/process.c | 6 +- > > arch/riscv/kernel/signal.c | 75 ++++++++++++-------- > > 9 files changed, 196 insertions(+), 127 deletions(-) > > create mode 100644 arch/riscv/kernel/fpu.S > > Thanks! I'll add this to our for-next branch. Any updates?