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Signed-off-by: Rajan Vaja Signed-off-by: Jolly Shah --- .../bindings/power/xlnx,zynqmp-genpd.txt | 34 +++++++++++++++++++ include/dt-bindings/power/xlnx-zynqmp-power.h | 39 ++++++++++++++++++++++ 2 files changed, 73 insertions(+) create mode 100644 Documentation/devicetree/bindings/power/xlnx,zynqmp-genpd.txt create mode 100644 include/dt-bindings/power/xlnx-zynqmp-power.h diff --git a/Documentation/devicetree/bindings/power/xlnx,zynqmp-genpd.txt b/Documentation/devicetree/bindings/power/xlnx,zynqmp-genpd.txt new file mode 100644 index 0000000..3c7f237 --- /dev/null +++ b/Documentation/devicetree/bindings/power/xlnx,zynqmp-genpd.txt @@ -0,0 +1,34 @@ +----------------------------------------------------------- +Device Tree Bindings for the Xilinx Zynq MPSoC PM domains +----------------------------------------------------------- +The binding for zynqmp-power-controller follow the common +generic PM domain binding[1]. + +[1] Documentation/devicetree/bindings/power/power_domain.txt + +== Zynq MPSoC Generic PM Domain Node == + +Required property: + - Below property should be in zynqmp-firmware node. + - #power-domain-cells: Number of cells in a PM domain specifier. Must be 1. + +Power domain ID indexes are mentioned in +include/dt-bindings/power/xlnx-zynqmp-power.h. + +------- +Example +------- + +firmware { + zynqmp_firmware: zynqmp-firmware { + ... + #power-domain-cells = <1>; + ... + }; +}; + +sata { + ... + power-domains = <&zynqmp_firmware 2>; + ... +}; diff --git a/include/dt-bindings/power/xlnx-zynqmp-power.h b/include/dt-bindings/power/xlnx-zynqmp-power.h new file mode 100644 index 0000000..1bc9636 --- /dev/null +++ b/include/dt-bindings/power/xlnx-zynqmp-power.h @@ -0,0 +1,39 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (C) 2018 Xilinx, Inc. + */ + +#ifndef _DT_BINDINGS_ZYNQMP_POWER_H +#define _DT_BINDINGS_ZYNQMP_POWER_H + +#define PD_USB_0 0 +#define PD_USB_1 1 +#define PD_SATA 2 +#define PD_SPI_0 3 +#define PD_SPI_1 4 +#define PD_UART_0 5 +#define PD_UART_1 6 +#define PD_ETH_0 7 +#define PD_ETH_1 8 +#define PD_ETH_2 9 +#define PD_ETH_3 10 +#define PD_I2C_0 11 +#define PD_I2C_1 12 +#define PD_DP 13 +#define PD_GDMA 14 +#define PD_ADMA 15 +#define PD_TTC_0 16 +#define PD_TTC_1 17 +#define PD_TTC_2 18 +#define PD_TTC_3 19 +#define PD_SD_0 20 +#define PD_SD_1 21 +#define PD_NAND 22 +#define PD_QSPI 23 +#define PD_GPIO 24 +#define PD_CAN_0 25 +#define PD_CAN_1 26 +#define PD_PCIE 27 +#define PD_GPU 28 + +#endif -- 2.7.4