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[209.132.180.67]) by mx.google.com with ESMTP id h28-v6si7104558pgm.67.2018.10.05.02.43.33; Fri, 05 Oct 2018 02:43:49 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727826AbeJEQlN (ORCPT + 99 others); Fri, 5 Oct 2018 12:41:13 -0400 Received: from mx08-00178001.pphosted.com ([91.207.212.93]:38006 "EHLO mx07-00178001.pphosted.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1727444AbeJEQlN (ORCPT ); Fri, 5 Oct 2018 12:41:13 -0400 Received: from pps.filterd (m0046661.ppops.net [127.0.0.1]) by mx08-.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id w959d0Ug019133; Fri, 5 Oct 2018 11:42:29 +0200 Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx08-00178001.pphosted.com with ESMTP id 2mu1bkb6f5-1 (version=TLSv1 cipher=ECDHE-RSA-AES256-SHA bits=256 verify=NOT); Fri, 05 Oct 2018 11:42:29 +0200 Received: from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 57EB738; Fri, 5 Oct 2018 09:42:28 +0000 (GMT) Received: from Webmail-eu.st.com (sfhdag6node2.st.com [10.75.127.17]) by zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id E664A2655; Fri, 5 Oct 2018 09:42:27 +0000 (GMT) Received: from localhost (10.75.127.50) by SFHDAG6NODE2.st.com (10.75.127.17) with Microsoft SMTP Server (TLS) id 15.0.1347.2; Fri, 5 Oct 2018 11:42:27 +0200 From: To: , , , , , , , CC: , , , , Christophe Kerello Subject: [PATCH v2 0/3] mtd: rawnand: add STM32 FMC2 NAND flash controller driver Date: Fri, 5 Oct 2018 11:41:57 +0200 Message-ID: <1538732520-2800-1-git-send-email-christophe.kerello@st.com> X-Mailer: git-send-email 1.9.1 MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.75.127.50] X-ClientProxiedBy: SFHDAG4NODE1.st.com (10.75.127.10) To SFHDAG6NODE2.st.com (10.75.127.17) X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:,, definitions=2018-10-05_05:,, signatures=0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Christophe Kerello This patchset adds the support for the STMicroelectronics FMC2 NAND flash controller found on STM32MP SOCs. This patchset supports: - the command sequencer feature, a hardware accelerator for read/write within a page - the manual mode feature, useful for debug purpose - a maximum 8k page size - following ECC strength and step size - nand-ecc-strength = <8>, nand-ecc-step-size = <512> (BCH8) - nand-ecc-strength = <4>, nand-ecc-step-size = <512> (BCH4) - nand-ecc-strength = <1>, nand-ecc-step-size = <512> (Extended ecc based on HAMMING) This patchset has been tested on Micron MT29F8G08ABACAH4 (8-bit SLC NAND) and MT29F8G16ABACAH4 (16-bit SLC NAND) Changes v2: - separate the controller structure and the NAND chip structure - remove timings description from the device tree - fix typo issues - fix kbuildrobot issues Christophe Kerello (3): dt-bindings: mtd: stm32_fmc2: add STM32 FMC2 NAND controller documentation mtd: rawnand: stm32_fmc2: add STM32 FMC2 NAND flash controller driver mtd: rawnand: stm32_fmc2: add manual mode .../devicetree/bindings/mtd/stm32-fmc2-nand.txt | 59 + drivers/mtd/nand/raw/Kconfig | 9 + drivers/mtd/nand/raw/Makefile | 1 + drivers/mtd/nand/raw/stm32_fmc2_nand.c | 1997 ++++++++++++++++++++ 4 files changed, 2066 insertions(+) create mode 100644 Documentation/devicetree/bindings/mtd/stm32-fmc2-nand.txt create mode 100644 drivers/mtd/nand/raw/stm32_fmc2_nand.c -- 1.9.1