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Subject: [PATCH v2 00/11] arch/x86: AMD QoS support
Thread-Topic: [PATCH v2 00/11] arch/x86: AMD QoS support
Thread-Index: AQHUXO3CTn+1tr8+o06JtjDxs0CMcA==
Date:   Fri, 5 Oct 2018 20:55:34 +0000
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This series adds support for AMD64 architectural extensions for Platform
Quality of Service. These extensions are intended to provide for the
monitoring of the usage of certain system resources by one or more
processors and for the separate allocation and enforcement of limits on
the use of certain system resources by one or more processors.

The monitoring and enforcement are not necessarily applied across the
entire system, but in general apply to a QOS domain which corresponds to
some shared system resource.  The set of resources which are monitored and
the set for which the enforcement of limits is provided are implementation
dependent. Platform QOS features are implemented on a logical processor bas=
is.
Therefore, multiple hardware threads of a single physical CPU core may have
independent resource monitoring and enforcement configurations.

AMD's next generation of processors support following QoS sub-features.
- L3 Cache allocation enforcement
- L3 Cache occupancy monitoring
- L3 Code-Data Prioritization support
- Memory Bandwidth Enforcement(Allocation)

The public specification for this feature is available at
https://www.amd.com/system/files/TechDocs/56375_Quality_of_Service_Extensio=
ns.pdf

Obviously, there are multiple ways we can go about these changes. We felt
it is appropriate to rename and re-organize the code little bit before
making the functional changes. The first few patches(1-6) renames and
re-organizes the sources in preparation. Rest of the patches(7-11) adds
support for AMD QoS features.

Please review and provide me feedback. If you think of any better way to
approach this, please let us know.=20

Changes from v1 -> v2:
 a. Removed RFC from subject header. Based on the discussion so far,=20
    plan is to go ahead with these patches and eventually re-structure
    the code to make arch and non-arch separate.
 b. Addressed comments from Reinette Chatre and Fenghua Yu.
 c. Separated quirks and MBA from rdt init code. Kept the rest of the
    code as is.
 d. Added _intel suffixes all the Intel only code just like AMD code.
 e. Added one more patch to bring the macros into header file.
 f. Few minor text changes.

v1:
https://lore.kernel.org/lkml/20180924191841.29111-1-babu.moger@amd.com/

Babu Moger (10):
  arch/x86: Start renaming the rdt files to more generic names
  arch/x86: Rename the RDT functions and definitions
  arch/x86: Re-arrange RDT init code
  arch/x86: Bring all the macros to rdt.h
  arch/x86: Introduce a new config parameter PLATFORM_QOS
  arch/x86: Use new config parameter PLATFORM_QOS for compilation
  arch/x86: Initialize the resource functions that are different
  arch/x86: Bring few more functions into the resource structure
  arch/x86: Introduce new config parameter AMD_QOS
  arch/x86: Introduce QOS feature for AMD

Sherry Hurwitz (1):
  arch/x86: Add AMD feature bit X86_FEATURE_MBA in cpuid bits array

 arch/x86/Kconfig                              |  19 ++
 .../asm/{intel_rdt_sched.h =3D> rdt_sched.h}    |  26 +--
 arch/x86/kernel/cpu/Makefile                  |   6 +-
 arch/x86/kernel/cpu/{intel_rdt.c =3D> rdt.c}    | 167 +++++++++++++++---
 arch/x86/kernel/cpu/{intel_rdt.h =3D> rdt.h}    |  41 +++--
 ...el_rdt_ctrlmondata.c =3D> rdt_ctrlmondata.c} |  78 +++++++-
 .../{intel_rdt_monitor.c =3D> rdt_monitor.c}    |  29 +--
 ...el_rdt_pseudo_lock.c =3D> rdt_pseudo_lock.c} |   6 +-
 ...o_lock_event.h =3D> rdt_pseudo_lock_event.h} |   2 +-
 .../{intel_rdt_rdtgroup.c =3D> rdt_rdtgroup.c}  |  14 +-
 arch/x86/kernel/cpu/scattered.c               |   7 +-
 arch/x86/kernel/process_32.c                  |   4 +-
 arch/x86/kernel/process_64.c                  |   4 +-
 include/linux/sched.h                         |   2 +-
 14 files changed, 316 insertions(+), 89 deletions(-)
 rename arch/x86/include/asm/{intel_rdt_sched.h =3D> rdt_sched.h} (80%)
 rename arch/x86/kernel/cpu/{intel_rdt.c =3D> rdt.c} (85%)
 rename arch/x86/kernel/cpu/{intel_rdt.h =3D> rdt.h} (92%)
 rename arch/x86/kernel/cpu/{intel_rdt_ctrlmondata.c =3D> rdt_ctrlmondata.c=
} (86%)
 rename arch/x86/kernel/cpu/{intel_rdt_monitor.c =3D> rdt_monitor.c} (96%)
 rename arch/x86/kernel/cpu/{intel_rdt_pseudo_lock.c =3D> rdt_pseudo_lock.c=
} (99%)
 rename arch/x86/kernel/cpu/{intel_rdt_pseudo_lock_event.h =3D> rdt_pseudo_=
lock_event.h} (95%)
 rename arch/x86/kernel/cpu/{intel_rdt_rdtgroup.c =3D> rdt_rdtgroup.c} (99%=
)

--=20
2.17.1