Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67;
From:   Jernej Skrabec <jernej.skrabec@siol.net>
To:     maxime.ripard@bootlin.com, wens@csie.org
Cc:     robh+dt@kernel.org, sboyd@kernel.org, airlied@linux.ie,
        architt@codeaurora.org, a.hajda@samsung.com,
        Laurent.pinchart@ideasonboard.com, devicetree@vger.kernel.org,
        linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org,
        linux-clk@vger.kernel.org, dri-devel@lists.freedesktop.org,
        linux-sunxi@googlegroups.com, stable@vger.kernel.org
Subject: [PATCH v2 03/29] clk: sunxi-ng: Use u64 for calculation of NM rate
Date:   Sun,  7 Oct 2018 11:38:39 +0200
Message-Id: <20181007093905.11253-4-jernej.skrabec@siol.net>
In-Reply-To: <20181007093905.11253-1-jernej.skrabec@siol.net>
References: <20181007093905.11253-1-jernej.skrabec@siol.net>
MIME-Version: 1.0
Content-Transfer-Encoding: quoted-printable
Sender: linux-kernel-owner@vger.kernel.org
Precedence: bulk

Allwinner H6 SoC has multiplier N range between 1 and 254. Since parent
rate is 24MHz, intermediate result when calculating final rate easily
overflows 32 bit variable.

Because of that, introduce function for calculating clock rate which
uses 64 bit variable for intermediate result.

Fixes: 6174a1e24b0d ("clk: sunxi-ng: Add N-M-factor clock support")
Fixes: ee28648cb2b4 ("clk: sunxi-ng: Remove the use of rational computati=
ons")

CC: <stable@vger.kernel.org>
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
---
 drivers/clk/sunxi-ng/ccu_nm.c | 18 +++++++++++++++---
 1 file changed, 15 insertions(+), 3 deletions(-)

diff --git a/drivers/clk/sunxi-ng/ccu_nm.c b/drivers/clk/sunxi-ng/ccu_nm.=
c
index 6fe3c14f7b2d..424d8635b053 100644
--- a/drivers/clk/sunxi-ng/ccu_nm.c
+++ b/drivers/clk/sunxi-ng/ccu_nm.c
@@ -19,6 +19,17 @@ struct _ccu_nm {
 	unsigned long	m, min_m, max_m;
 };
=20
+static unsigned long ccu_nm_calc_rate(unsigned long parent,
+				      unsigned long n, unsigned long m)
+{
+	u64 rate =3D parent;
+
+	rate *=3D n;
+	do_div(rate, m);
+
+	return rate;
+}
+
 static void ccu_nm_find_best(unsigned long parent, unsigned long rate,
 			     struct _ccu_nm *nm)
 {
@@ -28,7 +39,8 @@ static void ccu_nm_find_best(unsigned long parent, unsi=
gned long rate,
=20
 	for (_n =3D nm->min_n; _n <=3D nm->max_n; _n++) {
 		for (_m =3D nm->min_m; _m <=3D nm->max_m; _m++) {
-			unsigned long tmp_rate =3D parent * _n  / _m;
+			unsigned long tmp_rate =3D ccu_nm_calc_rate(parent,
+								  _n, _m);
=20
 			if (tmp_rate > rate)
 				continue;
@@ -100,7 +112,7 @@ static unsigned long ccu_nm_recalc_rate(struct clk_hw=
 *hw,
 	if (ccu_sdm_helper_is_enabled(&nm->common, &nm->sdm))
 		rate =3D ccu_sdm_helper_read_rate(&nm->common, &nm->sdm, m, n);
 	else
-		rate =3D parent_rate * n / m;
+		rate =3D ccu_nm_calc_rate(parent_rate, n, m);
=20
 	if (nm->common.features & CCU_FEATURE_FIXED_POSTDIV)
 		rate /=3D nm->fixed_post_div;
@@ -149,7 +161,7 @@ static long ccu_nm_round_rate(struct clk_hw *hw, unsi=
gned long rate,
 	_nm.max_m =3D nm->m.max ?: 1 << nm->m.width;
=20
 	ccu_nm_find_best(*parent_rate, rate, &_nm);
-	rate =3D *parent_rate * _nm.n / _nm.m;
+	rate =3D ccu_nm_calc_rate(*parent_rate, _nm.n, _nm.m);
=20
 	if (nm->common.features & CCU_FEATURE_FIXED_POSTDIV)
 		rate /=3D nm->fixed_post_div;
--=20
2.19.0