Received: by 2002:ac0:a582:0:0:0:0:0 with SMTP id m2-v6csp2875807imm; Sun, 7 Oct 2018 14:04:49 -0700 (PDT) X-Google-Smtp-Source: ACcGV62lXYrx8ijNlbdngj2fkiWaqowKJgbTxVwDhUFdR7zaSDMwFlVbjFSq9ar37LVwY3i/DPaw X-Received: by 2002:a63:cf0e:: with SMTP id j14-v6mr18529158pgg.195.1538946286979; Sun, 07 Oct 2018 14:04:46 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1538946286; cv=none; d=google.com; s=arc-20160816; b=WvJMTnJkMGfJ/tfIR4nP75+/NKAJ378DJta6KVg7N3V/+vVQ3IsdXwaIPfDXY48QLG YHlHMbdFAeY3B41ijXtKRO3ESMPyeSuulCokdQSIDX2hjXLTgiI8OH+PALR9Toefjq6h QK+8qKk1ZrO1kAxLZf4laWzaAxiCdUl+cuwLNs/2mFDhUYwlmoNYm9e+j8c8DsgJCJC1 1ab6oPTMRNCFvLur6Tm13FUy91m9+nqnez809JgDmAM5evpCYJZ5g+XZlxgLkWrxMgF9 DVWXYFE0hywcETXLMcMKEXNLjGmOILmwKmMNzMmzzb+CK2Lf4ihUpp3OyMewO94Y5d47 qQ/Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:to:references:message-id :content-transfer-encoding:cc:date:in-reply-to:from:subject :mime-version:dkim-signature; bh=DiWlLkcuyaA8x/ZpCBRfIi+uAckyxbxXNYWbwuw0ues=; b=Dx9ggK/dGQMoQNXXskcyfFSYtrEfXI8P4HKc1XoPrzPzHNQdBNX5cOA9imKNd//0zs pEnZTZjsp0zwS/hNL2uWoMIoiWTxoGauEAkjqeiA37kqGE2IsNgmc/c1lElj6BNsLZGu l9Bbo1ujGmoP991KTTBikq2uiKKsPSzizBZUQo8eb2lkqMgfginfnWIZWCV9++9b0FAZ TCUr31PV9vzLU/CB3VYu5mVxR/xmsrT8Z+7sHvyfGYz15Egxvw1O1Y2ckxu1nvH2qLO3 6cS4/EcYsP01l1Xp6EFfDAamO2USU+2Z15tVt2ecc7JfvntTqKWLnOBLBLmWQ9unPFkm /yvQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@oracle.com header.s=corp-2018-07-02 header.b=O4e7XWyR; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=oracle.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id 194-v6si17098531pfy.164.2018.10.07.14.04.32; Sun, 07 Oct 2018 14:04:46 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@oracle.com header.s=corp-2018-07-02 header.b=O4e7XWyR; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=oracle.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726254AbeJHEKm (ORCPT + 99 others); Mon, 8 Oct 2018 00:10:42 -0400 Received: from userp2120.oracle.com ([156.151.31.85]:38456 "EHLO userp2120.oracle.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725755AbeJHEKm (ORCPT ); Mon, 8 Oct 2018 00:10:42 -0400 Received: from pps.filterd (userp2120.oracle.com [127.0.0.1]) by userp2120.oracle.com (8.16.0.22/8.16.0.22) with SMTP id w97L0Dsi084838; Sun, 7 Oct 2018 21:02:06 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oracle.com; h=content-type : mime-version : subject : from : in-reply-to : date : cc : content-transfer-encoding : message-id : references : to; s=corp-2018-07-02; bh=DiWlLkcuyaA8x/ZpCBRfIi+uAckyxbxXNYWbwuw0ues=; b=O4e7XWyRHe9TrTumR64HvNA0hVSafcTJ/hp9R0SkwXvnorwgFU6gDLHhTZeCiQHtCQDj gQc0hxw1/WdVj3e2FT2PrRZI0Tgyn9bwcyBkMouUltXR8cDb3vbb16b8cwEytOY+Kgtt /PL6rCQSpM4u1oRbafT5pmI3TCo7YxLmeEoaumZCgDhCu4E3BZevLacHQPmZXopup/ly id2DiwrmtcQ8tcJABfpLjBlj4a056bmqkepko2j5lSEEdmSeW9w9nCtqbkeWXSoL6yXJ nJYZVHSu9Ch94IGUFwpuSYq234cA+ZSRs4HYf5oz/Wnglrgn1929vDkmFB7ZGZ6LrtPI uw== Received: from aserv0021.oracle.com (aserv0021.oracle.com [141.146.126.233]) by userp2120.oracle.com with ESMTP id 2mxnpqk8h4-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Sun, 07 Oct 2018 21:02:05 +0000 Received: from userv0122.oracle.com (userv0122.oracle.com [156.151.31.75]) by aserv0021.oracle.com (8.14.4/8.14.4) with ESMTP id w97L24CP022638 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Sun, 7 Oct 2018 21:02:04 GMT Received: from abhmp0019.oracle.com (abhmp0019.oracle.com [141.146.116.25]) by userv0122.oracle.com (8.14.4/8.14.4) with ESMTP id w97L240t016892; Sun, 7 Oct 2018 21:02:04 GMT Received: from [192.168.14.112] (/79.178.223.28) by default (Oracle Beehive Gateway v4.0) with ESMTP ; Sun, 07 Oct 2018 21:02:03 +0000 Content-Type: text/plain; charset=utf-8 Mime-Version: 1.0 (Mac OS X Mail 11.1 \(3445.4.7\)) Subject: Re: [PATCH] KVM: LAPIC: Tune lapic_timer_advance_ns automatically From: Liran Alon In-Reply-To: <1538115136-20092-1-git-send-email-wanpengli@tencent.com> Date: Mon, 8 Oct 2018 00:02:00 +0300 Cc: linux-kernel@vger.kernel.org, kvm@vger.kernel.org, Paolo Bonzini , =?utf-8?B?UmFkaW0gS3LEjW3DocWZ?= Content-Transfer-Encoding: quoted-printable Message-Id: <8847332B-9759-4FF2-B6D8-02334AE11015@oracle.com> References: <1538115136-20092-1-git-send-email-wanpengli@tencent.com> To: Wanpeng Li X-Mailer: Apple Mail (2.3445.4.7) X-Proofpoint-Virus-Version: vendor=nai engine=5900 definitions=9039 signatures=668706 X-Proofpoint-Spam-Details: rule=notspam policy=default score=0 suspectscore=0 malwarescore=0 phishscore=0 bulkscore=0 spamscore=0 mlxscore=0 mlxlogscore=999 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1807170000 definitions=main-1810070214 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org > On 28 Sep 2018, at 9:12, Wanpeng Li wrote: >=20 > From: Wanpeng Li >=20 > In cloud environment, lapic_timer_advance_ns is needed to be tuned for = every CPU=20 > generations, and every host kernel versions(the = kvm-unit-tests/tscdeadline_latency.flat=20 > is 5700 cycles for upstream kernel and 9600 cycles for our 3.10 = product kernel,=20 > both preemption_timer=3DN, Skylake server). >=20 > This patch adds the capability to automatically tune = lapic_timer_advance_ns > step by step, the initial value is 1000ns as d0659d946be05 (KVM: x86: = add=20 > option to advance tscdeadline hrtimer expiration) recommended, it will = be=20 > reduced when it is too early, and increased when it is too late. The = guest_tsc=20 > and tsc_deadline are hard to equal, so we assume we are done when the = delta=20 > is within a small scope e.g. 100 cycles. This patch reduces latency=20 > (kvm-unit-tests/tscdeadline_latency, busy waits, preemption_timer = enabled) > from ~2600 cyles to ~1200 cyles on our Skylake server. >=20 > Cc: Paolo Bonzini > Cc: Radim Kr=C4=8Dm=C3=A1=C5=99 > Signed-off-by: Wanpeng Li > --- > arch/x86/kvm/lapic.c | 7 +++++++ > arch/x86/kvm/x86.c | 2 +- > 2 files changed, 8 insertions(+), 1 deletion(-) >=20 > diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lapic.c > index fbb0e6d..b756f12 100644 > --- a/arch/x86/kvm/lapic.c > +++ b/arch/x86/kvm/lapic.c > @@ -70,6 +70,8 @@ > #define APIC_BROADCAST 0xFF > #define X2APIC_BROADCAST 0xFFFFFFFFul >=20 > +static bool __read_mostly lapic_timer_advance_adjust_done =3D false; > + > static inline int apic_test_vector(int vec, void *bitmap) > { > return test_bit(VEC_POS(vec), (bitmap) + REG_POS(vec)); > @@ -1492,6 +1494,11 @@ void wait_lapic_expire(struct kvm_vcpu *vcpu) > if (guest_tsc < tsc_deadline) > __delay(min(tsc_deadline - guest_tsc, > nsec_to_cycles(vcpu, lapic_timer_advance_ns))); > + if (!lapic_timer_advance_adjust_done) { > + lapic_timer_advance_ns +=3D (s64)(guest_tsc - = tsc_deadline) / 8; I don=E2=80=99t understand how this =E2=80=9C/ 8=E2=80=9D converts = between guest TSC units to host nanoseconds. I think that instead you should do something like: s64 ns =3D (s64)(guest_tsc - tsc_deadline) * 1000000ULL; do_div(ns, vcpu->arch.virtual_tsc_khz); lapic_timer_advance_ns +=3D ns; > + if (abs(guest_tsc - tsc_deadline) < 100) I would put this =E2=80=9C100=E2=80=9D hard-coded value as some = =E2=80=9C#define=E2=80=9D to make code more clear. > + lapic_timer_advance_adjust_done =3D true; > + } > } >=20 > static void start_sw_tscdeadline(struct kvm_lapic *apic) > diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c > index edbf00e..e865d12 100644 > --- a/arch/x86/kvm/x86.c > +++ b/arch/x86/kvm/x86.c > @@ -136,7 +136,7 @@ static u32 __read_mostly tsc_tolerance_ppm =3D = 250; > module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR); >=20 > /* lapic timer advance (tscdeadline mode only) in nanoseconds */ > -unsigned int __read_mostly lapic_timer_advance_ns =3D 0; > +unsigned int lapic_timer_advance_ns =3D 1000; > module_param(lapic_timer_advance_ns, uint, S_IRUGO | S_IWUSR); > EXPORT_SYMBOL_GPL(lapic_timer_advance_ns); >=20 > --=20 > 2.7.4 >=20