Received: by 2002:ac0:a582:0:0:0:0:0 with SMTP id m2-v6csp4895968imm; Tue, 9 Oct 2018 06:54:07 -0700 (PDT) X-Google-Smtp-Source: ACcGV62I5faL4uFaWCiz9mbFyUDKkBGNVWMDo3C0AR9v0A2Jv1PA+xj91oLXoLd0EEZs4+OwcS44 X-Received: by 2002:a63:fc46:: with SMTP id r6-v6mr26029555pgk.345.1539093247039; Tue, 09 Oct 2018 06:54:07 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1539093247; cv=none; d=google.com; s=arc-20160816; b=cQ6kZl8vWmjVW8Q1C4Wd+VHlrmYHa9dCgERPDEwa9o9bV82aMoz+evGdETfunN78zD G4LnxGjdnmj58ak5EdRpwi06f/SZdvqrsWK80gxq4ZRrh9q/rMZeLjZXCwc2omXqyMIx bpjKJmg/WfobO2Gh7m+EMDR2DYKVf0wD0Kg9+3nOfPW2QEG3iPfd5Lfd2YoTUB+mE0uA y6jijbB8GLb9QrAxt8Dxk6+aQVFohqKRkExzuAWorIUaPkijXKB0S2duSvFiF1f+LDEd 8jm0EbYmKmAUOcRMGlODF5PwuTAfPd7nAbW5Ves8WFEAjhqgAxLZrlP9cK61Aa59d9x/ 9GTw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:date:cc:to:subject:from:references :in-reply-to:message-id; bh=+5nVlnI6mu7muDTAN6bu+0RmTSfMDf9a1JibAOqcCV4=; b=C5cTWTZhnx78p9DVSjMXkCe84JejEbP5hGQSqQhLc2Cbp5NZKZ2dwkXMGHsQcM+yAs Bn9CUGurd5y2u2rto31Yl8qIHidkZDgpdEiRbOy1jn2YPUIQOwfcFuAzjK99sXf00f89 /Cj2EbUiK80H54iD2ilxOvAKo3sXL4+BWmVqD5TiXCpSXdyxgCEO7v+NklmUKnAVOTsZ 64/UYzT6tUaq+Qj/tKajil0NpvV2k4clqYpBXzJUPAXzqHetGtjP9wE2s5YqpcOnj/Fo 5p5T2a27gDwp3mlWmwzaga5lfc4f9cXf+RVpadqsPEa7sxYooynd8lHy41X2EgQeMQoh qV3w== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id i4-v6si18816288pgk.564.2018.10.09.06.53.51; Tue, 09 Oct 2018 06:54:07 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727785AbeJIVJb (ORCPT + 99 others); Tue, 9 Oct 2018 17:09:31 -0400 Received: from pegase1.c-s.fr ([93.17.236.30]:3131 "EHLO pegase1.c-s.fr" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726664AbeJIVJb (ORCPT ); Tue, 9 Oct 2018 17:09:31 -0400 Received: from localhost (mailhub1-int [192.168.12.234]) by localhost (Postfix) with ESMTP id 42TzDj47PVz9ttgQ; Tue, 9 Oct 2018 15:52:05 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at c-s.fr Received: from pegase1.c-s.fr ([192.168.12.234]) by localhost (pegase1.c-s.fr [192.168.12.234]) (amavisd-new, port 10024) with ESMTP id Rgk9iDUDvFE5; Tue, 9 Oct 2018 15:52:05 +0200 (CEST) Received: from messagerie.si.c-s.fr (messagerie.si.c-s.fr [192.168.25.192]) by pegase1.c-s.fr (Postfix) with ESMTP id 42TzDj3Z7yz9ttfw; Tue, 9 Oct 2018 15:52:05 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by messagerie.si.c-s.fr (Postfix) with ESMTP id 26AF18B80B; Tue, 9 Oct 2018 15:52:17 +0200 (CEST) X-Virus-Scanned: amavisd-new at c-s.fr Received: from messagerie.si.c-s.fr ([127.0.0.1]) by localhost (messagerie.si.c-s.fr [127.0.0.1]) (amavisd-new, port 10023) with ESMTP id kNJe8wF8m5Kp; Tue, 9 Oct 2018 15:52:17 +0200 (CEST) Received: from pc13168vm.idsi0.si.c-s.fr (unknown [192.168.232.3]) by messagerie.si.c-s.fr (Postfix) with ESMTP id D0DB18B80A; Tue, 9 Oct 2018 15:52:16 +0200 (CEST) Received: by pc13168vm.idsi0.si.c-s.fr (Postfix, from userid 0) id 7B86B6F444; Tue, 9 Oct 2018 13:52:16 +0000 (UTC) Message-Id: <2b1bca2aba3213b13dadaca5e311a15e9fcb1aab.1539092112.git.christophe.leroy@c-s.fr> In-Reply-To: References: From: Christophe Leroy Subject: [PATCH v3 22/24] powerpc/mm: Get rid of pte-common.h To: Bartlomiej Zolnierkiewicz , Benjamin Herrenschmidt , Dominik Brodowski , Geoff Levand , Jens Axboe , Kumar Gala , Li Yang , Michael Ellerman , Nicholas Piggin , Paul Mackerras , Scott Wood , aneesh.kumar@linux.vnet.ibm.com Cc: linux-arm-kernel@lists.infradead.org, linux-block@vger.kernel.org, linux-fbdev@vger.kernel.org, linux-kernel@vger.kernel.org, linuxppc-dev@lists.ozlabs.org, dri-devel@lists.freedesktop.org Date: Tue, 9 Oct 2018 13:52:16 +0000 (UTC) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Do not include pte-common.h in nohash/32/pgtable.h As that was the last includer, get rid of pte-common.h Reviewed-by: Aneesh Kumar K.V Signed-off-by: Christophe Leroy --- arch/powerpc/include/asm/nohash/32/pgtable.h | 23 +++++++++++++++++++++-- arch/powerpc/include/asm/pte-common.h | 25 ------------------------- 2 files changed, 21 insertions(+), 27 deletions(-) delete mode 100644 arch/powerpc/include/asm/pte-common.h diff --git a/arch/powerpc/include/asm/nohash/32/pgtable.h b/arch/powerpc/include/asm/nohash/32/pgtable.h index ce9270a0ea42..d2908a8038e8 100644 --- a/arch/powerpc/include/asm/nohash/32/pgtable.h +++ b/arch/powerpc/include/asm/nohash/32/pgtable.h @@ -128,8 +128,27 @@ extern int icache_44x_need_flush; #include #endif -/* And here we include common definitions */ -#include +/* Location of the PFN in the PTE. Most 32-bit platforms use the same + * as _PAGE_SHIFT here (ie, naturally aligned). + * Platform who don't just pre-define the value so we don't override it here + */ +#ifndef PTE_RPN_SHIFT +#define PTE_RPN_SHIFT (PAGE_SHIFT) +#endif + +/* The mask covered by the RPN must be a ULL on 32-bit platforms with + * 64-bit PTEs + */ +#if defined(CONFIG_PPC32) && defined(CONFIG_PTE_64BIT) +#define PTE_RPN_MASK (~((1ULL << PTE_RPN_SHIFT) - 1)) +#else +#define PTE_RPN_MASK (~((1UL << PTE_RPN_SHIFT) - 1)) +#endif + +/* _PAGE_CHG_MASK masks of bits that are to be preserved across + * pgprot changes + */ +#define _PAGE_CHG_MASK (PTE_RPN_MASK | _PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_SPECIAL) #ifndef __ASSEMBLY__ diff --git a/arch/powerpc/include/asm/pte-common.h b/arch/powerpc/include/asm/pte-common.h deleted file mode 100644 index ff01368a175a..000000000000 --- a/arch/powerpc/include/asm/pte-common.h +++ /dev/null @@ -1,25 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* Included from asm/pgtable-*.h only ! */ - -/* Location of the PFN in the PTE. Most 32-bit platforms use the same - * as _PAGE_SHIFT here (ie, naturally aligned). - * Platform who don't just pre-define the value so we don't override it here - */ -#ifndef PTE_RPN_SHIFT -#define PTE_RPN_SHIFT (PAGE_SHIFT) -#endif - -/* The mask covered by the RPN must be a ULL on 32-bit platforms with - * 64-bit PTEs - */ -#if defined(CONFIG_PPC32) && defined(CONFIG_PTE_64BIT) -#define PTE_RPN_MASK (~((1ULL<