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From:   Andreas Schwab <schwab@suse.de>
To:     Atish Patra <atish.patra@wdc.com>
Cc:     palmer@sifive.com, linux-riscv@lists.infradead.org,
        linux-pwm@vger.kernel.org, linux-gpio@vger.kernel.org,
        linus.walleij@linaro.org, robh+dt@kernel.org,
        thierry.reding@gmail.com, devicetree@vger.kernel.org,
        linux-kernel@vger.kernel.org, mark.rutland@arm.com,
        hch@infradead.org
Subject: Re: [RFC 4/4] gpio: sifive: Add GPIO driver for SiFive SoCs
References: <1539111085-25502-1-git-send-email-atish.patra@wdc.com>
        <1539111085-25502-5-git-send-email-atish.patra@wdc.com>
Date:   Wed, 10 Oct 2018 15:01:29 +0200
In-Reply-To: <1539111085-25502-5-git-send-email-atish.patra@wdc.com> (Atish
        Patra's message of "Tue, 9 Oct 2018 11:51:25 -0700")
Message-ID: <mvmo9c22bx2.fsf@suse.de>
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On Okt 09 2018, Atish Patra <atish.patra@wdc.com> wrote:

> +static void sifive_set_ie(struct sifive_gpio *chip, unsigned int offset)
> +{
> +	unsigned long flags;
> +	unsigned int trigger;
> +
> +	raw_spin_lock_irqsave(&chip->lock, flags);
> +	trigger = (chip->enabled & BIT(offset)) ? chip->trigger[offset] : 0;

This should use test_bit instead.

Andreas.

-- 
Andreas Schwab, SUSE Labs, schwab@suse.de
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