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[209.132.180.67]) by mx.google.com with ESMTP id z16-v6si22907131pgu.525.2018.10.10.10.09.56; Wed, 10 Oct 2018 10:10:11 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727160AbeJKAcF (ORCPT + 99 others); Wed, 10 Oct 2018 20:32:05 -0400 Received: from foss.arm.com ([217.140.101.70]:55678 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726607AbeJKAcF (ORCPT ); Wed, 10 Oct 2018 20:32:05 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 02411ED1; Wed, 10 Oct 2018 10:09:02 -0700 (PDT) Received: from arrakis.emea.arm.com (arrakis.cambridge.arm.com [10.1.196.80]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 7E0C33F5B3; Wed, 10 Oct 2018 10:09:00 -0700 (PDT) Date: Wed, 10 Oct 2018 18:08:58 +0100 From: Catalin Marinas To: Will Deacon Cc: Punit Agrawal , Jonathan Corbet , steve.capper@arm.com, Randy Dunlap , linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: Re: [PATCH v2] Documentation/arm64: HugeTLB page implementation Message-ID: <20181010170857.GF212880@arrakis.emea.arm.com> References: <97e4e5fb-24ed-0545-414a-6a0c0116e6b8@infradead.org> <20181008100355.31820-1-punit.agrawal@arm.com> <67f4ceb7-d41c-ab7a-4d5e-c147dadf6860@infradead.org> <87ftxf7812.fsf@e105922-lin.cambridge.arm.com> <20181009115049.GA6248@arm.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20181009115049.GA6248@arm.com> User-Agent: Mutt/1.10.1 (2018-07-13) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, Oct 09, 2018 at 12:50:49PM +0100, Will Deacon wrote: > On Tue, Oct 09, 2018 at 11:02:01AM +0100, Punit Agrawal wrote: > > Randy Dunlap writes: > > > > > On 10/8/18 3:03 AM, Punit Agrawal wrote: > > >> Arm v8 architecture supports multiple page sizes - 4k, 16k and > > >> 64k. Based on the active page size, the Linux port supports > > >> corresponding hugepage sizes at PMD and PUD(4k only) levels. > > >> > > >> In addition, the architecture also supports caching larger sized > > >> ranges (composed of multiple entries) at the PTE and PMD level in the > > >> TLBs using the contiguous bit. The Linux port makes use of this > > >> architectural support to enable additional hugepage sizes. > > >> > > >> Describe the two different types of hugepages supported by the arm64 > > >> kernel and the hugepage sizes enabled by each. > > >> > > >> Signed-off-by: Punit Agrawal > > >> Cc: Catalin Marinas > > >> Cc: Will Deacon > > >> Cc: Jonathan Corbet > > > > > > Acked-by: Randy Dunlap > > > > Thanks! > > > > Catalin, Will - I assume you'll pick this up at some point? Or do arm64 > > documentation patches get routed by another tree? > > Acked-by: Will Deacon > > Catalin can pick this up for 4.20. Done. -- Catalin