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[209.132.180.67]) by mx.google.com with ESMTP id 3-v6si26127553pgi.473.2018.10.11.01.13.15; Thu, 11 Oct 2018 01:13:30 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727610AbeJKO4s (ORCPT + 99 others); Thu, 11 Oct 2018 10:56:48 -0400 Received: from mail-qt1-f196.google.com ([209.85.160.196]:43494 "EHLO mail-qt1-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726135AbeJKO4r (ORCPT ); Thu, 11 Oct 2018 10:56:47 -0400 Received: by mail-qt1-f196.google.com with SMTP id q41-v6so8742783qtq.10 for ; Thu, 11 Oct 2018 00:30:47 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=NKbiLLke6MP/0FcmMV9ZeoaTU7oBYAbuD+pPwrcu6n8=; b=X+aq2rumIL7L052kCUFb0mOsZynRiIMLnVQ8LoepRWlnuCoHKkL5GxaJBAYzzDv5dM Gpwu+bwgz0vztFImKhK4OdjFJsZdEgE7GXCUqBy1edZc6l4rUIhUqvNwqgQdysDk+SBq efFHVzfUM11aq1coRGwFRiz3UiG1xIrobVqgDj5SRzo3Mn6E673Ij+xqCLfQw7YmacaB Q8rLM77UdXzc31OdfuviKvr2xbmyF223zYhagKEAqO389Bu/WQdRzgFKPKTl80O0sWkX 0jUElOcCwY9sZp67ORVB1vNcqaCxYI2z3sjfgnPVQ2MY8zzVC+ummrMQBfgISO1heLyE rklQ== X-Gm-Message-State: ABuFfoh8E5pNMbYtHBwzKR6fAmxNHIv5UqExrJL3Vzoi6fMxbMN0HFLa +2LpUH53f4pgaqQEyLb5PyG9CHbqo+mDxMmUKsY= X-Received: by 2002:a0c:881c:: with SMTP id 28mr434808qvl.40.1539243046934; Thu, 11 Oct 2018 00:30:46 -0700 (PDT) MIME-Version: 1.0 References: <1539224450-19928-1-git-send-email-vincentc@andestech.com> <1539224450-19928-2-git-send-email-vincentc@andestech.com> In-Reply-To: <1539224450-19928-2-git-send-email-vincentc@andestech.com> From: Arnd Bergmann Date: Thu, 11 Oct 2018 09:30:30 +0200 Message-ID: Subject: Re: [PATCH v2 1/5] nds32: nds32 FPU port To: Vincent Chen Cc: Greentime Hu , Linux Kernel Mailing List , Vincent Chen Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, Oct 11, 2018 at 4:56 AM Vincent Chen wrote: > > This commit contains basic components for nds32 FPU support such as > FPU exception handler and context switch for FPU register. > > diff --git a/arch/nds32/Kconfig.cpu b/arch/nds32/Kconfig.cpu > index b8c8984..7ee4e19 100644 > --- a/arch/nds32/Kconfig.cpu > +++ b/arch/nds32/Kconfig.cpu > @@ -7,6 +7,28 @@ config CPU_LITTLE_ENDIAN > bool "Little endian" > default y > > +config FPU > + bool "FPU support" > + default n > + help > + If FPU ISA is used in user space, this configure shall be Y to make > + the fpu context switch and fpu exception handler is enabled in kernel. > + Lazy FPU is the default scheme for fpu context switch. If user wants > + to disable Lazy FPU scheme, please enable CONFIG_UNLAZY_FPU. > + > + If no FPU ISA is used in user space, say N. There was a long discussion on RISC-V about what happens when FPU support is enabled or disabled, you may have seen that as well. Can you confirm that: a) A kernel with FPU support enabled running on a CPU without an FPU will behave the same as a kernel without FPU support, and in particular not crash while trying to access the FPU b) A kernel with FPU support disabled running on a CPU with an FPU prevents user space from accessing the FPU, to avoid corrupting FPU registers during a task switch when a process accidentally contains FPU access > +config UNLAZY_FPU > + bool "Unlazy FPU support" > + depends on FPU > + default n > + help > + Say Y here to disable lazy FPU scheme. Disable lazy FPU scheme causes > + some performance loss because the fpu register are loaded and stored > + in each context switch. > + > + For nomal case, say N. I prefer Kconfig symbols to avoid using negatives, as this easily gets confusing. Why not do it like config LAZY_FPU_SWITCHING bool "Lazy FPU switching" depends on FPU default y Arnd