Received: by 2002:ac0:a582:0:0:0:0:0 with SMTP id m2-v6csp651842imm; Fri, 12 Oct 2018 04:37:07 -0700 (PDT) X-Google-Smtp-Source: ACcGV60WA7mlznniNWYKQEIc9LPi54ExxACwzOdd4lfmtNED4VBKEW214N4hzeq2LSGkJP05Ve8W X-Received: by 2002:a17:902:654e:: with SMTP id d14-v6mr5560643pln.292.1539344227382; Fri, 12 Oct 2018 04:37:07 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1539344227; cv=none; d=google.com; s=arc-20160816; b=dRJ7TZpWKEdEj3N57IhJi7+g8ldpEMuJ7hDuDjFcUQUABcYFGiOCUsXSXBWmNHG0uy kPC3gG+iUS31rCHLZ+OGMUkYVhKMQu+YvY3aG2dMJybW7cnuNDFjxCOf3qREiv8HcMEx udJXt74En5lgZxw8KF7lWubAjpMDjsIlK9XMwYfkQZS3XTbvQLcXn4RwN5P8XqjgqOLY 0cMYz2tKN4RPg3jQyzvAcOfsz9EsJmtbRk/VT0Y3wVA4MCzP0jbFCdZnDejElkXH/q0r /nqbVrxZ60/hijN/XIpntEGRGo+JsLQZQG0BIApwHXOvVdq9ZYp72sKf7M7+tvX+W8HN jiBw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding :content-language:in-reply-to:mime-version:user-agent:date :message-id:from:cc:references:to:subject; bh=7QLV194a8ryr/LUcLoPzZ7MON/+ZEHXmBjQYasgoFUA=; b=cVHO87gscu8RaeQZczGtl9yg2bM7rP0aIqy7Dvg218EyzwoW1cvVtRrOlErnNkrd/G oEKRxbdmCAW1z911xzrqNQVaK/U1Dt90QGr40wJuXY5mrPQiRFsxhTETrjiVxcxt2ED9 L57VvFxrUhLuOqOYWUsRa8YCQf5Ktb4tWGwbx3CMdXDtpn/0xlzUzGTjjeZI0uvHdGUr pdg/dYeCsHXVpizgreWSQdVzMO3xSHoECoYVC2AaKyAR4Fj/2qrrXiYJuggXz2a0fnMH nEJfcZ9b1Z2AZuODgULASmEBxESShtQeAO76iK+57zGmQOdemJfl9uvdvEg5LsQVZkx1 6J8g== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id p17-v6si986143pgj.416.2018.10.12.04.36.53; Fri, 12 Oct 2018 04:37:07 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728357AbeJLTHx (ORCPT + 99 others); Fri, 12 Oct 2018 15:07:53 -0400 Received: from foss.arm.com ([217.140.101.70]:50204 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727838AbeJLTHx (ORCPT ); Fri, 12 Oct 2018 15:07:53 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id DB471ED1; Fri, 12 Oct 2018 04:35:51 -0700 (PDT) Received: from [10.1.196.46] (melchizedek.cambridge.arm.com [10.1.196.46]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id BA39C3F5D3; Fri, 12 Oct 2018 04:35:49 -0700 (PDT) Subject: Re: [PATCH v3 2/2] arm/arm64: KVM: enable 32 bits kvm vcpu events support To: Dongjiu Geng References: <1539284855-4035-1-git-send-email-gengdongjiu@huawei.com> <1539284855-4035-3-git-send-email-gengdongjiu@huawei.com> Cc: christoffer.dall@arm.com, marc.zyngier@arm.com, suzuki.poulose@arm.com, peter.maydell@linaro.org, drjones@redhat.com, linux-arm-kernel@lists.infradead.org, kvmarm@lists.cs.columbia.edu, linux-kernel@vger.kernel.org, kvm@vger.kernel.org From: James Morse Message-ID: <51a366e2-1e40-8aac-4fe3-604b74542f29@arm.com> Date: Fri, 12 Oct 2018 12:35:48 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.0 MIME-Version: 1.0 In-Reply-To: <1539284855-4035-3-git-send-email-gengdongjiu@huawei.com> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Dongjiu Geng, On 11/10/2018 20:07, Dongjiu Geng wrote: > The commit 539aee0edb9f ("KVM: arm64: Share the parts of > get/set events useful to 32bit") shares the get/set events > helper for arm64 and arm32, Oops. I evidently didn't test this bit. Looks like I just depended on the symbol to be defined, I didn't check the CAP was exposed. > it is better also share the check > for vcpu events capability to enable 32 bit kvm vcpu events > support. not just better, necessary for correctly-written user-space to know the feature is supported. This last bit would be clearer as: "but forgot to share the cap extension code." Thanks for catching this! Acked-by: James Morse Thanks, James