Received: by 2002:ac0:a582:0:0:0:0:0 with SMTP id m2-v6csp1202470imm; Fri, 12 Oct 2018 13:40:18 -0700 (PDT) X-Google-Smtp-Source: ACcGV61QQJW79dPSFGO1mb4MIyirBuGWRr6uzUt+gp0y62USffD6m5hti1JHLwoVd+YwxfK4Vk6Q X-Received: by 2002:a63:3507:: with SMTP id c7-v6mr6811646pga.158.1539376818776; Fri, 12 Oct 2018 13:40:18 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1539376818; cv=none; d=google.com; s=arc-20160816; b=xsNALOLPGnH0ToCvG5gnxZhsztXIEwBe1BGgQSjbrVoHJxhP0XJY5/Oio0j35P7X5I zFvsxDf5dnf/BZ1lFTUYO4NtHqPyUNHwULzUWFQmzjIp7QU/3oATHbnmTUA8JQ3zIaKi yteicr/51EugXIJiqurOS7dKZQr+6S0toQjg3irz1/CyrlxpXKGlPGdWFVScmMYy2i1J PJmuENpzBrCOW4YueBvHBCtposL3rl6Q7WuI5+KXrD/UL3VQv7hdIJeJS2SgU0qAgmko 0Q1SBF18jdUUf3H0c2DZMjf5L9WihIBtL3JBHx9+nMZkseX0XvjZ3ORv2lF4j8eB3R5N VPYg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature; bh=uPZoG7xBIXV1527/eKMNrcpLfJdSOy5pxS4ndXfw/U4=; b=euUNBgMhCyJj7+TJy0MhFUF+C4t5hP0t3Cqp7sUUyF9czPUMgYCHSSKNTZcP/belhL pQXfYN8LJA7wqc0BP6X3MPgc2p5jox+16/dtbDGeKXiWZ9qoEGTVl3PoNjM4MQjYEVQ2 4Upd3VepwyhRT/gplscZJLXC0ArkX8CEMa8VMG4psIVHYBP5kYZIkGo8sZATN4/jsGz2 7ODQV0n2UBlb7/TN2GJNTTCnZkf11j8wstZklnB1/vx6mHgg3OlImR0I828Hn9CM+yS0 7DCTjQMEEiXOPnUnVHncUND/7VktkkfRAhFVg0nBu1QcRNgKtWsScFajzSV/KGYMaEKR mRYA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@gmail.com header.s=20161025 header.b=gJ7bBPFw; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id e8-v6si2268426pgh.447.2018.10.12.13.40.01; Fri, 12 Oct 2018 13:40:18 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@gmail.com header.s=20161025 header.b=gJ7bBPFw; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1725942AbeJMENw (ORCPT + 99 others); Sat, 13 Oct 2018 00:13:52 -0400 Received: from mail-lj1-f196.google.com ([209.85.208.196]:41494 "EHLO mail-lj1-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725745AbeJMENw (ORCPT ); Sat, 13 Oct 2018 00:13:52 -0400 Received: by mail-lj1-f196.google.com with SMTP id u21-v6so12428779lja.8 for ; Fri, 12 Oct 2018 13:39:36 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=uPZoG7xBIXV1527/eKMNrcpLfJdSOy5pxS4ndXfw/U4=; b=gJ7bBPFwk6UNq/ljMObuduPaWDzsI6mo8boiBdGO7iSycb1Xpux0EP24aQqDRarYda bkET1vEjgi8YAnsdHxi0AdJmok+UmaDjUg7LjwNiji01eQ5qGHyjG5I5+PofM5QrE8yQ pWEjX6XM30r+E7yI/oIBIZJpE83Gkwbrr52SlqRXgUqX+UBh3wyMYAN48JJCW9A43nCJ jEqy/ALZX5vZkeGv3rEPy4gE8aI/qXRTHh5Vshv/dOGRf63AFuC9K7YKY6teNIEp3mlF kjUWmO+81djOIjP0L9b49h1IuXaXQEeNvGoyLW+EmdTCrEP2uxDjfeG55ECu4AW7pJrH LfIA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=uPZoG7xBIXV1527/eKMNrcpLfJdSOy5pxS4ndXfw/U4=; b=KEyBJMrwSuQsAY2kEDtkFU0feHiv2SpsZx78SURuUJqx+/3GoAPUweXWZOmrWKgWqs tKwO0vmWA92Gkn1LqBfOeH56P4fwId9JhSWG3zEtbuTSiv5f0+SP9cnG/Pi4alU6R75d AuNpa+39QQQfn9hNt1nHLo6WvX1t7do+Uakuqbljt/S5SIvSiD7JhtX0w5OaaJp4VIba luwWfy8ulsgSNbi28+Ujd+QDfpUqBSobdbyJmXBWGPX90loQJxcYkFvfDOQ9jNSJVewU jv33C66/V0EJZHz+kV35AM1QLnDkHcp9vbtWR01jA/IqhWuTawrod0UhdkQY5d5jX0lY 4Pcg== X-Gm-Message-State: ABuFfojhTus005v9UpwN7DjA0ntoYMRWNNWED1LVwursjFyNBERaSCEh RZqVyKtMT5juDdA9Vg6c9v0= X-Received: by 2002:a2e:86ca:: with SMTP id n10-v6mr4931782ljj.90.1539376775501; Fri, 12 Oct 2018 13:39:35 -0700 (PDT) Received: from localhost.localdomain ([31.0.86.150]) by smtp.gmail.com with ESMTPSA id s4-v6sm460187ljh.11.2018.10.12.13.39.33 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 12 Oct 2018 13:39:34 -0700 (PDT) From: Janusz Krzysztofik To: Boris Brezillon , Miquel Raynal Cc: Richard Weinberger , David Woodhouse , Brian Norris , Marek Vasut , linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org, Janusz Krzysztofik Subject: [PATCH v2 1/2] mtd: rawnand: Provide helper for polling GPIO R/B pin Date: Fri, 12 Oct 2018 22:41:00 +0200 Message-Id: <20181012204101.26274-1-jmkrzyszt@gmail.com> X-Mailer: git-send-email 2.16.4 In-Reply-To: <20181003120028.9257-1-jmkrzyszt@gmail.com> References: <20181003120028.9257-1-jmkrzyszt@gmail.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Each controller driver with access to NAND R/B pin over GPIO would have to reimplement the polling loop otherwise. Signed-off-by: Janusz Krzysztofik --- Changelog: v2: New patch - v1 consisted of only one patch (the followning one) drivers/mtd/nand/raw/nand_base.c | 38 ++++++++++++++++++++++++++++++++++++++ include/linux/mtd/rawnand.h | 10 ++++++++++ 2 files changed, 48 insertions(+) diff --git a/drivers/mtd/nand/raw/nand_base.c b/drivers/mtd/nand/raw/nand_base.c index 05bd0779fe9b..ff1ac4a3c647 100644 --- a/drivers/mtd/nand/raw/nand_base.c +++ b/drivers/mtd/nand/raw/nand_base.c @@ -45,6 +45,9 @@ #include #include #include +#ifdef CONFIG_GPIOLIB +#include +#endif #include "internals.h" @@ -531,6 +534,41 @@ int nand_soft_waitrdy(struct nand_chip *chip, unsigned long timeout_ms) }; EXPORT_SYMBOL_GPL(nand_soft_waitrdy); +#ifdef CONFIG_GPIOLIB +/** + * nand_gpio_waitrdy - Poll R/B GPIO pin until ready + * @chip: NAND chip structure + * @gpiod: GPIO descriptor of R/B pin + * @timeout_ms: Timeout in ms + * + * Poll the R/B GPIO pin until it becomes ready. If that does not happen + * whitin the specified timeout, -ETIMEDOUT is returned. + * + * This helper is intended to be used when the controller has access to the + * NAND R/B pin over GPIO. + * + * Be aware that calling this helper from an ->exec_op() implementation means + * ->exec_op() must be re-entrant. + * + * Return 0 if the R/B pin indicates chip is ready, a negative error otherwise. + */ +int nand_gpio_waitrdy(struct nand_chip *chip, struct gpio_desc *gpiod, + unsigned long timeout_ms) +{ + /* Wait until command is processed or timeout occurs */ + timeout_ms = jiffies + msecs_to_jiffies(timeout_ms); + do { + if (gpiod_get_value_cansleep(gpiod)) + return 0; + + cond_resched(); + } while (time_before(jiffies, timeout_ms)); + + return gpiod_get_value_cansleep(gpiod) ? 0 : -ETIMEDOUT; +}; +EXPORT_SYMBOL_GPL(nand_gpio_waitrdy); +#endif + /** * panic_nand_get_device - [GENERIC] Get chip for selected access * @chip: the nand chip descriptor diff --git a/include/linux/mtd/rawnand.h b/include/linux/mtd/rawnand.h index e10b126e148f..09f0ed1345b1 100644 --- a/include/linux/mtd/rawnand.h +++ b/include/linux/mtd/rawnand.h @@ -1346,4 +1346,14 @@ void nand_release(struct nand_chip *chip); */ int nand_soft_waitrdy(struct nand_chip *chip, unsigned long timeout_ms); +#ifdef CONFIG_GPIOLIB +struct gpio_desc; +/* + * External helper for controller drivers that have to implement the WAITRDY + * instruction and do have GPIO pin to check it. + */ +int nand_gpio_waitrdy(struct nand_chip *chip, struct gpio_desc *gpiod, + unsigned long timeout_ms); +#endif + #endif /* __LINUX_MTD_RAWNAND_H */ -- 2.16.4