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[209.132.180.67]) by mx.google.com with ESMTP id z70-v6si4913003pfi.214.2018.10.13.10.50.16; Sat, 13 Oct 2018 10:50:45 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@gmail.com header.s=20161025 header.b=Im1aqaYG; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726837AbeJNB1s (ORCPT + 99 others); Sat, 13 Oct 2018 21:27:48 -0400 Received: from mail-ot1-f67.google.com ([209.85.210.67]:35265 "EHLO mail-ot1-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726636AbeJNB1s (ORCPT ); Sat, 13 Oct 2018 21:27:48 -0400 Received: by mail-ot1-f67.google.com with SMTP id 14so11287713oth.2; Sat, 13 Oct 2018 10:49:43 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=Hur/UQSGeKyBxkxNDsWOpnXAJMIqj/VK7d0r4EoTVBY=; b=Im1aqaYG90Sc+xYC/4WQtXGi4xU/JDvqQ/qK3eUk1LYexRNU5/YuGNikm+Hv0Zg6jp pq7rFjUfAtPeJv2q9DeT1GhVCX3h42c4LBqRumEMgKaVCtCsuMFC5dVjY2h0x4Ix7qb7 KDZi2+RBa92aUm4kVljOxxT9YJzIRgIxgBKyfX2oZZ8PPz17qcycUNPS9egC4gfNwn87 zqJRB1yUj1NQcXRPvnSaM/0bLmVPntlgEHc6ypup0gmoiQHO0CIGhSnhbFPRMDO6w0D1 AR6rGu1rr03EiVUr6tqe3+G5NUZIRgtqlcChr1xQcXwAHUOzQHvqLl3DplfiQllFPeJv /8qA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=Hur/UQSGeKyBxkxNDsWOpnXAJMIqj/VK7d0r4EoTVBY=; b=QStMpOYRW6uDn1u/yzSkpFhRCLxETIHiFQ1c27BMflyhRISL96rNDMV5mjC+d/NWwR KLhh3OPq+XmTa7fGJFQaf9SqKd+JbAfuUfluPE2YkKWmOzYVw/Tfrzf4Il/qTRg7PSLZ xjM2gE/ZbhV3gaD4GTKFjrXNx0cyyNjvcZewgixCw7EneVUspXJeild2oW73xmhmuZlw MIGROiVdo7LIYOVHOX4/yYjkhLiiDk4J7bS0+3zLZwsNb+rNARhtsDIYFTQhiD64ctZN S5GzuLUuP7rU6xgDatknHjOP7pBJUkYq/1eVU87SMymZUi7KoV/wpfP5IQEtk7ZiweLn PAfw== X-Gm-Message-State: ABuFfoitRHlaSPtoRnzFXqMAaH5yzpXwzb8EdebIRJ6IzZbXN1AtCNja rAharz5T7w4mfnzmvBXwGGAKU1LsraWChpyBQ6c= X-Received: by 2002:a9d:44a8:: with SMTP id v40mr3886118ote.219.1539452983295; Sat, 13 Oct 2018 10:49:43 -0700 (PDT) MIME-Version: 1.0 References: <20181011221237.1925.85591.stgit@localhost.localdomain> <20181011221334.1925.31961.stgit@localhost.localdomain> In-Reply-To: From: Pavel Tatashin Date: Sat, 13 Oct 2018 13:49:06 -0400 Message-ID: Subject: Re: [mm PATCH v2 1/6] mm: Use mm_zero_struct_page from SPARC on all 64b architectures To: Alexander Duyck Cc: alexander.h.duyck@linux.intel.com, Linux Memory Management List , Andrew Morton , Pasha Tatashin , Michal Hocko , dave.jiang@intel.com, LKML , willy@infradead.org, davem@davemloft.net, yi.z.zhang@linux.intel.com, khalid.aziz@oracle.com, rppt@linux.vnet.ibm.com, Vlastimil Babka , sparclinux@vger.kernel.org, dan.j.williams@intel.com, ldufour@linux.vnet.ibm.com, mgorman@techsingularity.net, mingo@kernel.org, kirill.shutemov@linux.intel.com Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Still, lets get some real data, please provide Intel data before vs after. I could test on an ARM processor. Pavel On Sat, Oct 13, 2018 at 1:18 PM Alexander Duyck wrote: > > Well in the case of x86 the call to memset is expensive as well. In > most cases it is 16 cycles plus 1 cycle per 16 bytes if I recall > correctly. So for example in the case of skbuff which was a little > over 192 bytes I know Jesper Brouer and myself were going back and > forth with the idea of if we should try to do something similar. > > I'm suspecting for the 64b architectures impacted by this change there > should be little to no negative impact. The main reason for that being > the fact that the compiler can actually drop some of the writes by > merging them with the later assignments. > > Thanks. > > - Alex > > On Sat, Oct 13, 2018 at 9:58 AM Pavel Tatashin wrote: > > > > I am worried about this change. I added SPARC optimized > > mm_zero_struct_page() specifically to SPARC because it has a poor > > performance with small memset()s, since it uses STBI instructions. > > However, other architectures might not suffer with small memset()s, > > and have hardware optimized memset variants for small sizes. Don't > > forget, this is a leaf routine on most arches, so the function call > > should be cheap. Also, the macro itself is not very flexible: when > > size of struct page is changed, it also must be modified (we could add > > fall throughs though), I would add this macro only to those arches > > that benefit from this change, in other words, I would like to see > > performance data. > > > > I will review the rest of the patches in this series on Monday. > > > > Thank you, > > Pavel > > On Thu, Oct 11, 2018 at 6:17 PM Alexander Duyck > > wrote: > > > > > > This change makes it so that we use the same approach that was already in > > > use on Sparc on all the archtectures that support a 64b long. > > > > > > This is mostly motivated by the fact that 8 to 10 store/move instructions > > > are likely always going to be faster than having to call into a function > > > that is not specialized for handling page init. > > > > > > An added advantage to doing it this way is that the compiler can get away > > > with combining writes in the __init_single_page call. As a result the > > > memset call will be reduced to only about 4 write operations, or at least > > > that is what I am seeing with GCC 6.2 as the flags, LRU poitners, and > > > count/mapcount seem to be cancelling out at least 4 of the 8 assignments on > > > my system. > > > > > > One change I had to make to the function was to reduce the minimum page > > > size to 56 to support some powerpc64 configurations. > > > > > > Signed-off-by: Alexander Duyck > > > --- > > > arch/sparc/include/asm/pgtable_64.h | 30 ------------------------------ > > > include/linux/mm.h | 34 ++++++++++++++++++++++++++++++++++ > > > 2 files changed, 34 insertions(+), 30 deletions(-) > > > > > > diff --git a/arch/sparc/include/asm/pgtable_64.h b/arch/sparc/include/asm/pgtable_64.h > > > index 1393a8ac596b..22500c3be7a9 100644 > > > --- a/arch/sparc/include/asm/pgtable_64.h > > > +++ b/arch/sparc/include/asm/pgtable_64.h > > > @@ -231,36 +231,6 @@ > > > extern struct page *mem_map_zero; > > > #define ZERO_PAGE(vaddr) (mem_map_zero) > > > > > > -/* This macro must be updated when the size of struct page grows above 80 > > > - * or reduces below 64. > > > - * The idea that compiler optimizes out switch() statement, and only > > > - * leaves clrx instructions > > > - */ > > > -#define mm_zero_struct_page(pp) do { \ > > > - unsigned long *_pp = (void *)(pp); \ > > > - \ > > > - /* Check that struct page is either 64, 72, or 80 bytes */ \ > > > - BUILD_BUG_ON(sizeof(struct page) & 7); \ > > > - BUILD_BUG_ON(sizeof(struct page) < 64); \ > > > - BUILD_BUG_ON(sizeof(struct page) > 80); \ > > > - \ > > > - switch (sizeof(struct page)) { \ > > > - case 80: \ > > > - _pp[9] = 0; /* fallthrough */ \ > > > - case 72: \ > > > - _pp[8] = 0; /* fallthrough */ \ > > > - default: \ > > > - _pp[7] = 0; \ > > > - _pp[6] = 0; \ > > > - _pp[5] = 0; \ > > > - _pp[4] = 0; \ > > > - _pp[3] = 0; \ > > > - _pp[2] = 0; \ > > > - _pp[1] = 0; \ > > > - _pp[0] = 0; \ > > > - } \ > > > -} while (0) > > > - > > > /* PFNs are real physical page numbers. However, mem_map only begins to record > > > * per-page information starting at pfn_base. This is to handle systems where > > > * the first physical page in the machine is at some huge physical address, > > > diff --git a/include/linux/mm.h b/include/linux/mm.h > > > index 273d4dbd3883..dee407998366 100644 > > > --- a/include/linux/mm.h > > > +++ b/include/linux/mm.h > > > @@ -102,8 +102,42 @@ static inline void set_max_mapnr(unsigned long limit) { } > > > * zeroing by defining this macro in . > > > */ > > > #ifndef mm_zero_struct_page > > > +#if BITS_PER_LONG == 64 > > > +/* This function must be updated when the size of struct page grows above 80 > > > + * or reduces below 64. The idea that compiler optimizes out switch() > > > + * statement, and only leaves move/store instructions > > > + */ > > > +#define mm_zero_struct_page(pp) __mm_zero_struct_page(pp) > > > +static inline void __mm_zero_struct_page(struct page *page) > > > +{ > > > + unsigned long *_pp = (void *)page; > > > + > > > + /* Check that struct page is either 56, 64, 72, or 80 bytes */ > > > + BUILD_BUG_ON(sizeof(struct page) & 7); > > > + BUILD_BUG_ON(sizeof(struct page) < 56); > > > + BUILD_BUG_ON(sizeof(struct page) > 80); > > > + > > > + switch (sizeof(struct page)) { > > > + case 80: > > > + _pp[9] = 0; /* fallthrough */ > > > + case 72: > > > + _pp[8] = 0; /* fallthrough */ > > > + default: > > > + _pp[7] = 0; /* fallthrough */ > > > + case 56: > > > + _pp[6] = 0; > > > + _pp[5] = 0; > > > + _pp[4] = 0; > > > + _pp[3] = 0; > > > + _pp[2] = 0; > > > + _pp[1] = 0; > > > + _pp[0] = 0; > > > + } > > > +} > > > +#else > > > #define mm_zero_struct_page(pp) ((void)memset((pp), 0, sizeof(struct page))) > > > #endif > > > +#endif > > > > > > /* > > > * Default maximum number of active map areas, this limits the number of vmas > > > > >