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From:   Uros Bizjak <ubizjak@gmail.com>
Date:   Sun, 14 Oct 2018 22:14:35 +0200
Message-ID: <CAFULd4ZDh5p8MY63-fQLFuXv90k6fa=o+8eP+gcSSND9G1Y0CA@mail.gmail.com>
Subject: Re: [PATCH] x86: Use assembly instruction mnemonics instead of .byte
 streams in arch_hweight.h
To:     bp@alien8.de
Cc:     x86@kernel.org, linux-kernel@vger.kernel.org
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On Sun, Oct 14, 2018 at 10:02 PM Borislav Petkov <bp@alien8.de> wrote:
>
> On Sun, Oct 14, 2018 at 09:15:00PM +0200, Uros Bizjak wrote:
> > The ChangeLog says "real INSTRUCTION mnemonics", e.g. POPCNTQ and POPCNTL.
>
> Right, INSTRUCTION.
>
> > The compiler will generate the register name with the correct implied
> > width (e.g. %rax for long, %eax for int), so the assembler will be
> > able to cross check if operands fit the instruction
>
> The __arch_hweightXX functions already enforce the proper type and
> the inline asm() operands already place the arguments in the proper
> registers where the instruction encoding expects them.
>
> So if you're going to relax this, then you could relax the inline asm
> operand specifications too. I say you "could" because then you need to
> fix arch/x86/lib/hweight.S too, which would be at least ugly. So I think
> we're stuck with %xDI/xAX and %xAX as operands, where 'x' is either 'r'
> or 'e'.
>
> > And there will be a couple of ugly #defines less.
>
> That's the only advantage of this change AFAICT. How about you reflect
> that in your commit message?

No problem, will send v2 with amended message.

Uros.