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Mon, 15 Oct 2018 04:15:11 -0700 (PDT) MIME-Version: 1.0 References: <1537788981-21479-1-git-send-email-yannick.fertre@st.com> <1537788981-21479-2-git-send-email-yannick.fertre@st.com> In-Reply-To: <1537788981-21479-2-git-send-email-yannick.fertre@st.com> From: Benjamin Gaignard Date: Mon, 15 Oct 2018 13:15:00 +0200 Message-ID: Subject: Re: [PATCH v1 1/2] drm: Add missing flags for pixel clock & data enable To: Yannick Fertre Cc: Philippe Cornu , Benjamin GAIGNARD , Vincent Abriou , Gustavo Padovan , Maarten Lankhorst , sean@poorly.run, David Airlie , ML dri-devel , Linux Kernel Mailing List Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Le lun. 24 sept. 2018 =C3=A0 13:59, Yannick Fertr=C3=A9 a =C3=A9crit : > > Add missing flags for pixel clock & data enable polarities. > These flags are similar to other synchronization signals (hsync, vsync...= ). > > Signed-off-by: Yannick Fertr=C3=A9 Reviewed-by: Benjamin Gaignard > --- > drivers/gpu/drm/drm_modes.c | 19 ++++++++++++++++++- > include/uapi/drm/drm_mode.h | 6 ++++++ > 2 files changed, 24 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/drm_modes.c b/drivers/gpu/drm/drm_modes.c > index 02db9ac..596f8b3 100644 > --- a/drivers/gpu/drm/drm_modes.c > +++ b/drivers/gpu/drm/drm_modes.c > @@ -130,7 +130,7 @@ EXPORT_SYMBOL(drm_mode_probed_add); > * according to the hdisplay, vdisplay, vrefresh. > * It is based from the VESA(TM) Coordinated Video Timing Generator by > * Graham Loveridge April 9, 2003 available at > - * http://www.elo.utfsm.cl/~elo212/docs/CVTd6r1.xls > + * http://www.elo.utfsm.cl/~elo212/docs/CVTd6r1.xls > * > * And it is copied from xf86CVTmode in xserver/hw/xfree86/modes/xf86cvt= .c. > * What I have done is to translate it by using integer calculation. > @@ -611,6 +611,15 @@ void drm_display_mode_from_videomode(const struct vi= deomode *vm, > dmode->flags |=3D DRM_MODE_FLAG_DBLSCAN; > if (vm->flags & DISPLAY_FLAGS_DOUBLECLK) > dmode->flags |=3D DRM_MODE_FLAG_DBLCLK; > + if (vm->flags & DISPLAY_FLAGS_PIXDATA_POSEDGE) > + dmode->flags |=3D DRM_MODE_FLAG_PPIXCLK; > + else if (vm->flags & DISPLAY_FLAGS_PIXDATA_NEGEDGE) > + dmode->flags |=3D DRM_MODE_FLAG_NPIXCLK; > + if (vm->flags & DISPLAY_FLAGS_DE_HIGH) > + dmode->flags |=3D DRM_MODE_FLAG_PDATAEN; > + else if (vm->flags & DISPLAY_FLAGS_DE_LOW) > + dmode->flags |=3D DRM_MODE_FLAG_NDE; > + > drm_mode_set_name(dmode); > } > EXPORT_SYMBOL_GPL(drm_display_mode_from_videomode); > @@ -652,6 +661,14 @@ void drm_display_mode_to_videomode(const struct drm_= display_mode *dmode, > vm->flags |=3D DISPLAY_FLAGS_DOUBLESCAN; > if (dmode->flags & DRM_MODE_FLAG_DBLCLK) > vm->flags |=3D DISPLAY_FLAGS_DOUBLECLK; > + if (dmode->flags & DRM_MODE_FLAG_PPIXDATA) > + vm->flags |=3D DISPLAY_FLAGS_PIXDATA_POSEDGE; > + else if (dmode->flags & DRM_MODE_FLAG_NPIXDATA) > + vm->flags |=3D DISPLAY_FLAGS_PIXDATA_NEGEDGE; > + if (dmode->flags & DRM_MODE_FLAG_PDE) > + vm->flags |=3D DISPLAY_FLAGS_DE_HIGH; > + else if (dmode->flags & DRM_MODE_FLAG_NDE) > + vm->flags |=3D DISPLAY_FLAGS_DE_LOW; > } > EXPORT_SYMBOL_GPL(drm_display_mode_to_videomode); > > diff --git a/include/uapi/drm/drm_mode.h b/include/uapi/drm/drm_mode.h > index d3e0fe3..b335a17 100644 > --- a/include/uapi/drm/drm_mode.h > +++ b/include/uapi/drm/drm_mode.h > @@ -89,6 +89,12 @@ extern "C" { > #define DRM_MODE_FLAG_3D_TOP_AND_BOTTOM (7<<14) > #define DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF (8<<14) > > +/* flags for polarity clock & data enable polarities */ > +#define DRM_MODE_FLAG_PPIXDATA (1 << 19) > +#define DRM_MODE_FLAG_NPIXDATA (1 << 20) > +#define DRM_MODE_FLAG_PDE (1 << 21) > +#define DRM_MODE_FLAG_NDE (1 << 22) > + > /* Picture aspect ratio options */ > #define DRM_MODE_PICTURE_ASPECT_NONE 0 > #define DRM_MODE_PICTURE_ASPECT_4_3 1 > -- > 2.7.4 > > _______________________________________________ > dri-devel mailing list > dri-devel@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/dri-devel