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[209.132.180.67]) by mx.google.com with ESMTP id z1-v6si11990768pfc.11.2018.10.15.09.50.26; Mon, 15 Oct 2018 09:50:42 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b=cqj8iPOm; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726815AbeJPAeg (ORCPT + 99 others); Mon, 15 Oct 2018 20:34:36 -0400 Received: from mail.kernel.org ([198.145.29.99]:38176 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726684AbeJPAeg (ORCPT ); Mon, 15 Oct 2018 20:34:36 -0400 Received: from localhost (unknown [104.132.0.74]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 2C1E62064A; Mon, 15 Oct 2018 16:48:34 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1539622114; bh=znxwo/KkYuHQ7BZTi+VB2plhm/XsXVWQ2KyC/W+QbvM=; h=To:From:In-Reply-To:Cc:References:Subject:Date:From; b=cqj8iPOmE0KwFpKdbX+XPS0iIcDG2F7RmFYwZnmFdWHEv2canwwM0bYQk7OAqdWgW tfNy6Xzn3VcFhdN1j7pB1p9YDeuPrlkh/XVNdObILkeArwMQEQqxBce/C42ZypoCQ4 YmW7nuNfDVUq6uBl1ynceoY1bGkrDANf+PyLHZ+E= Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable To: Shawn Guo , Vabhav Sharma From: Stephen Boyd In-Reply-To: Cc: "sudeep.holla@arm.com" , "oss@buserror.net" , "linux-kernel@vger.kernel.org" , "devicetree@vger.kernel.org" , "robh+dt@kernel.org" , "mark.rutland@arm.com" , "linuxppc-dev@lists.ozlabs.org" , "linux-arm-kernel@lists.infradead.org" , "mturquette@baylibre.com" , "rjw@rjwysocki.net" , "viresh.kumar@linaro.org" , "linux-clk@vger.kernel.org" , "linux-pm@vger.kernel.org" , "linux-kernel-owner@vger.kernel.org" , "catalin.marinas@arm.com" , "will.deacon@arm.com" , "gregkh@linuxfoundation.org" , "arnd@arndb.de" , "kstewart@linuxfoundation.org" , "yamada.masahiro@socionext.com" , Leo Li , "linux@armlinux.org.uk" , Varun Sethi , Udit Kumar , Pankaj Bansal , Ramneek Mehresh , Ying Zhang , Nipun Gupta , Priyanka Jain , Yogesh Narayan Gaur , Sriram Dash References: <1538615031-7507-1-git-send-email-vabhav.sharma@nxp.com> <1538615031-7507-6-git-send-email-vabhav.sharma@nxp.com> <20181008054510.GG3587@dragon> Message-ID: <153962211360.5275.18031876744546062419@swboyd.mtv.corp.google.com> User-Agent: alot/0.7 Subject: RE: [PATCH v4 5/6] arm64: dts: add QorIQ LX2160A SoC support Date: Mon, 15 Oct 2018 09:48:33 -0700 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Quoting Vabhav Sharma (2018-10-14 19:58:15) > > > + > > > + pmu { > > > + compatible =3D "arm,cortex-a72-pmu"; > > > + interrupts =3D ; > > > + }; > > > + > > > + psci { > > > + compatible =3D "arm,psci-0.2"; > > > + method =3D "smc"; > > > + }; > > > + > > > + memory@80000000 { > > > + // DRAM space - 1, size : 2 GB DRAM > > > + device_type =3D "memory"; > > > + reg =3D <0x00000000 0x80000000 0 0x80000000>; > > > + }; > > > + > > > + ddr1: memory-controller@1080000 { > > > + compatible =3D "fsl,qoriq-memory-controller"; > > > + reg =3D <0x0 0x1080000 0x0 0x1000>; > > > + interrupts =3D ; > > > + little-endian; > > > + }; > > > + > > > + ddr2: memory-controller@1090000 { > > > + compatible =3D "fsl,qoriq-memory-controller"; > > > + reg =3D <0x0 0x1090000 0x0 0x1000>; > > > + interrupts =3D ; > > > + little-endian; > > > + }; > > > + > > > + sysclk: sysclk { > > = > > Name the node a bit generic like clock-xxx. > There is only one clock-unit, Bootloader(U-boot) require sysclk node duri= ng device tree fix-up as different platform support varied platform frequen= cy as per reset configuration word used. > Referred other ARM based platform with one clock using name as x: x Please add a comment above this node with this information. Newcomers reading this DTS file won't have any idea why this node is specially named and a comment will help tremendously here.