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Subject: Re: [PATCH] x86: enable swiotlb for > 4GiG ram on 32-bit kernels
To:     Christoph Hellwig <hch@lst.de>, x86@kernel.org
Cc:     tedheadster@gmail.com, iommu@lists.linux-foundation.org,
        linux-kernel@vger.kernel.org
References: <20181014075208.2715-1-hch@lst.de>
From:   Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Organization: Oracle Corporation
Message-ID: <0a8d58b8-3c8b-c89f-e023-9d7d5d79f37c@oracle.com>
Date:   Mon, 15 Oct 2018 14:52:04 -0400
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On 10/14/18 3:52 AM, Christoph Hellwig wrote:
> We already build the swiotlb code for 32b-t kernels with PAE support,
> but the code to actually use swiotlb has only been enabled for 64-bit
> kernel for an unknown reason.
> 
> Before Linux 4.18 we papers over this fact because the networking code,
> the scsi layer and some random block drivers implenented their own
> bounce buffering scheme.
> 
> Fixes: 21e07dba ("scsi: reduce use of block bounce buffers")
> Fixes: ab74cfeb ("net: remove the PCI_DMA_BUS_IS_PHYS check in illegal_highdma")
> Reported-by: tedheadster <tedheadster@gmail.com>
> Tested-by: tedheadster <tedheadster@gmail.com>

Reviewed-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>

But since it is already in 'tip' feel free to ignore my tag.

Thanks!
> ---
>   arch/x86/kernel/pci-swiotlb.c | 2 --
>   1 file changed, 2 deletions(-)
> 
> diff --git a/arch/x86/kernel/pci-swiotlb.c b/arch/x86/kernel/pci-swiotlb.c
> index 661583662430..71c0b01d93b1 100644
> --- a/arch/x86/kernel/pci-swiotlb.c
> +++ b/arch/x86/kernel/pci-swiotlb.c
> @@ -42,10 +42,8 @@ IOMMU_INIT_FINISH(pci_swiotlb_detect_override,
>   int __init pci_swiotlb_detect_4gb(void)
>   {
>   	/* don't initialize swiotlb if iommu=off (no_iommu=1) */
> -#ifdef CONFIG_X86_64
>   	if (!no_iommu && max_possible_pfn > MAX_DMA32_PFN)
>   		swiotlb = 1;
> -#endif
>   
>   	/*
>   	 * If SME is active then swiotlb will be set to 1 so that bounce
>