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[209.132.180.67]) by mx.google.com with ESMTP id p186-v6si14551034pfb.200.2018.10.17.08.32.37; Wed, 17 Oct 2018 08:32:54 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b=DZ4qvd5y; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727388AbeJQX2U (ORCPT + 99 others); Wed, 17 Oct 2018 19:28:20 -0400 Received: from mail.kernel.org ([198.145.29.99]:51432 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727032AbeJQX2T (ORCPT ); Wed, 17 Oct 2018 19:28:19 -0400 Received: from localhost (unknown [104.132.0.74]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 188232150C; Wed, 17 Oct 2018 15:32:06 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1539790326; bh=W4wduh4CjJnVogAUXOi+A23JhsE6uRKABB3hOgRrwb4=; h=To:From:In-Reply-To:Cc:References:Subject:Date:From; b=DZ4qvd5yKxW/h9dIE3Y7n+EiI0s6x0d+m6h8CJfOoINnXcqzazndoSgQ0oM2thhm/ peNM1sNnFaQYIpVnSBNASv03UXqoSIUYU5GZyRH6+gTex9SPyetJwmcYBhFU6wA6aO cMYYPA2hZ7S8hU7SH6eG5ra0aycLM/ahdm6wX9d0= Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable To: ilia.lin@gmail.com From: Stephen Boyd In-Reply-To: <20180614215358.11264-7-ilia.lin@gmail.com> Cc: Rajendra Nayak , Ilia Lin , Michael Turquette , Rob Herring , Mark Rutland , Andy Gross , David Brown , Will Deacon , Amit Kucheria , linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org References: <20180614215358.11264-1-ilia.lin@gmail.com> <20180614215358.11264-7-ilia.lin@gmail.com> Message-ID: <153979032539.5275.12064078400966025600@swboyd.mtv.corp.google.com> User-Agent: alot/0.7 Subject: Re: [PATCH v13 6/8] clk: qcom: cpu-8996: Add support to switch to alternate PLL Date: Wed, 17 Oct 2018 08:32:05 -0700 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Quoting ilia.lin@gmail.com (2018-06-14 14:53:53) > @@ -227,6 +232,26 @@ clk_cpu_8996_mux_determine_rate(struct clk_hw *hw, s= truct clk_rate_request *req) > return 0; > } > = > +int cpu_clk_notifier_cb(struct notifier_block *nb, unsigned long event, static? And name it something like clk_cpu_8996_notifier? > + void *data) > +{ > + int ret; > + struct clk_cpu_8996_mux *cpuclk =3D to_clk_cpu_8996_mux_nb(nb); > + > + switch (event) { > + case PRE_RATE_CHANGE: > + ret =3D clk_cpu_8996_mux_set_parent(&cpuclk->clkr.hw, ALT= _INDEX); > + break; > + case POST_RATE_CHANGE: > + ret =3D clk_cpu_8996_mux_set_parent(&cpuclk->clkr.hw, PLL= _INDEX); > + break; > + default: > + ret =3D 0; > + break; > + } > + > + return notifier_from_errno(ret); > +};