Message-ID: <3FF4C0B7.30308@colorfullife.com>
Date: Fri, 02 Jan 2004 01:52:07 +0100
From: Manfred Spraul <manfred@colorfullife.com>
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To: vatsa@in.ibm.com
CC: linux-kernel@vger.kernel.org, rusty@au1.ibm.com,
       lhcs-devel@lists.sourceforge.net
Subject: Re: [lhcs-devel] Re: in_atomic doesn't count local_irq_disable?
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Srivatsa Vaddagiri wrote:

>More debugging reveals that the page fault happens
>always while doing a prefetch. The prefetch is
>present inside list_for_each_entry macros.
>
>For now I have disabled the x86 prefetch function
>to do nothing.
>
>The test seems to run fine so far w/o any of the 
>page faults I was experiencing. Will update
>at the end of the overnight run if I hit the problem again.
>
>Wonder if prefetch has some issues on Intel x86 (P3) SMP systems?
>  
>
Hmm. Perhaps prefetch updates CR2?
We know already that the CR2 is not directly linked to the page fault 
interrupt - if a page fault happens at the same time as a higher 
priority event (iirc hw interrupt), then CR2 is updated and the higher 
priority event is handled. That prevents Linux from using CR2 to store 
the cpu number - only netware can do that, because netware never causes 
paging faults.

Could you write a test module that reads cr2, executes a few prefetch 
instructions and then checks if cr2 changed? I won't have access to my 
P3 SMP system in the next few days.

--
    Manfred


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