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[209.132.180.67]) by mx.google.com with ESMTP id j9-v6si7735265pgs.289.2018.10.18.23.56.33; Thu, 18 Oct 2018 23:56:48 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727526AbeJSPAI (ORCPT + 99 others); Fri, 19 Oct 2018 11:00:08 -0400 Received: from pegase1.c-s.fr ([93.17.236.30]:6361 "EHLO pegase1.c-s.fr" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727444AbeJSPAH (ORCPT ); Fri, 19 Oct 2018 11:00:07 -0400 Received: from localhost (mailhub1-int [192.168.12.234]) by localhost (Postfix) with ESMTP id 42bxWF5Wjtz9ttFT; Fri, 19 Oct 2018 08:55:21 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at c-s.fr Received: from pegase1.c-s.fr ([192.168.12.234]) by localhost (pegase1.c-s.fr [192.168.12.234]) (amavisd-new, port 10024) with ESMTP id WxDhXAdeo87o; Fri, 19 Oct 2018 08:55:21 +0200 (CEST) Received: from messagerie.si.c-s.fr (messagerie.si.c-s.fr [192.168.25.192]) by pegase1.c-s.fr (Postfix) with ESMTP id 42bxWF5334z9ttFM; Fri, 19 Oct 2018 08:55:21 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by messagerie.si.c-s.fr (Postfix) with ESMTP id DE6068B8DF; Fri, 19 Oct 2018 08:55:22 +0200 (CEST) X-Virus-Scanned: amavisd-new at c-s.fr Received: from messagerie.si.c-s.fr ([127.0.0.1]) by localhost (messagerie.si.c-s.fr [127.0.0.1]) (amavisd-new, port 10023) with ESMTP id uQ4MnH_aPXJB; Fri, 19 Oct 2018 08:55:22 +0200 (CEST) Received: from pc13168vm.idsi0.si.c-s.fr (po15451.idsi0.si.c-s.fr [172.25.231.2]) by messagerie.si.c-s.fr (Postfix) with ESMTP id BA3F68B75B; Fri, 19 Oct 2018 08:55:22 +0200 (CEST) Received: by pc13168vm.idsi0.si.c-s.fr (Postfix, from userid 0) id 8618A6F496; Fri, 19 Oct 2018 06:55:22 +0000 (UTC) Message-Id: <73606304f6ebf6022c37ef48631b1f3a523db76e.1539931702.git.christophe.leroy@c-s.fr> In-Reply-To: References: From: Christophe Leroy Subject: [PATCH v6 15/20] powerpc/mm: don't use pte_alloc_one_kernel() before slab is available To: Benjamin Herrenschmidt , Paul Mackerras , Michael Ellerman Cc: linux-kernel@vger.kernel.org, linuxppc-dev@lists.ozlabs.org Date: Fri, 19 Oct 2018 06:55:22 +0000 (UTC) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org In the same way as PPC64, let's handle pte allocation directly in kernel_map_page() when slab is not available. The new function early_pte_alloc_kernel() is put in as inline in platforms pgalloc.h, this will allow to have different ones later. It is not an issue because early_pte_alloc_kernel() is called only once from map_kernel_page() and is inlined anyway. Signed-off-by: Christophe Leroy --- arch/powerpc/include/asm/book3s/32/pgalloc.h | 15 +++++++++++++++ arch/powerpc/include/asm/nohash/32/pgalloc.h | 15 +++++++++++++++ arch/powerpc/mm/pgtable_32.c | 20 +++++++------------- 3 files changed, 37 insertions(+), 13 deletions(-) diff --git a/arch/powerpc/include/asm/book3s/32/pgalloc.h b/arch/powerpc/include/asm/book3s/32/pgalloc.h index 96138ab3ddd6..4ddc7df20381 100644 --- a/arch/powerpc/include/asm/book3s/32/pgalloc.h +++ b/arch/powerpc/include/asm/book3s/32/pgalloc.h @@ -4,6 +4,7 @@ #include #include +#include /* * Functions that deal with pagetables that could be at any level of @@ -137,4 +138,18 @@ static inline void __pte_free_tlb(struct mmu_gather *tlb, pgtable_t table, { pgtable_free_tlb(tlb, page_address(table), 0); } + +static inline pte_t *early_pte_alloc_kernel(pmd_t *pmdp, unsigned long va) +{ + if (!pmd_present(*pmdp)) { + pte_t *ptep = __va(memblock_alloc(PAGE_SIZE, PAGE_SIZE)); + + if (!ptep) + return NULL; + + clear_page(ptep); + pmd_populate_kernel(&init_mm, pmdp, ptep); + } + return pte_offset_kernel(pmdp, va); +} #endif /* _ASM_POWERPC_BOOK3S_32_PGALLOC_H */ diff --git a/arch/powerpc/include/asm/nohash/32/pgalloc.h b/arch/powerpc/include/asm/nohash/32/pgalloc.h index 6fbbb90043c0..da8fdfc76418 100644 --- a/arch/powerpc/include/asm/nohash/32/pgalloc.h +++ b/arch/powerpc/include/asm/nohash/32/pgalloc.h @@ -4,6 +4,7 @@ #include #include +#include /* * Functions that deal with pagetables that could be at any level of @@ -139,4 +140,18 @@ static inline void __pte_free_tlb(struct mmu_gather *tlb, pgtable_t table, tlb_flush_pgtable(tlb, address); pgtable_free_tlb(tlb, page_address(table), 0); } + +static inline pte_t *early_pte_alloc_kernel(pmd_t *pmdp, unsigned long va) +{ + if (!pmd_present(*pmdp)) { + pte_t *ptep = __va(memblock_alloc(PAGE_SIZE, PAGE_SIZE)); + + if (!ptep) + return NULL; + + clear_page(ptep); + pmd_populate_kernel(&init_mm, pmdp, ptep); + } + return pte_offset_kernel(pmdp, va); +} #endif /* _ASM_POWERPC_PGALLOC_32_H */ diff --git a/arch/powerpc/mm/pgtable_32.c b/arch/powerpc/mm/pgtable_32.c index 5877f5aa8f5d..ea4442dde0d5 100644 --- a/arch/powerpc/mm/pgtable_32.c +++ b/arch/powerpc/mm/pgtable_32.c @@ -43,18 +43,9 @@ EXPORT_SYMBOL(ioremap_bot); /* aka VMALLOC_END */ extern char etext[], _stext[], _sinittext[], _einittext[]; -__ref pte_t *pte_alloc_one_kernel(struct mm_struct *mm, unsigned long address) +pte_t *pte_alloc_one_kernel(struct mm_struct *mm, unsigned long address) { - pte_t *pte; - - if (slab_is_available()) { - pte = (pte_t *)__get_free_page(GFP_KERNEL|__GFP_ZERO); - } else { - pte = __va(memblock_alloc(PAGE_SIZE, PAGE_SIZE)); - if (pte) - clear_page(pte); - } - return pte; + return (pte_t *)__get_free_page(GFP_KERNEL | __GFP_ZERO); } pgtable_t pte_alloc_one(struct mm_struct *mm, unsigned long address) @@ -222,7 +213,7 @@ void iounmap(volatile void __iomem *addr) } EXPORT_SYMBOL(iounmap); -int map_kernel_page(unsigned long va, phys_addr_t pa, pgprot_t prot) +__ref int map_kernel_page(unsigned long va, phys_addr_t pa, pgprot_t prot) { pmd_t *pd; pte_t *pg; @@ -231,7 +222,10 @@ int map_kernel_page(unsigned long va, phys_addr_t pa, pgprot_t prot) /* Use upper 10 bits of VA to index the first level map */ pd = pmd_offset(pud_offset(pgd_offset_k(va), va), va); /* Use middle 10 bits of VA to index the second-level map */ - pg = pte_alloc_kernel(pd, va); + if (slab_is_available()) + pg = pte_alloc_kernel(pd, va); + else + pg = early_pte_alloc_kernel(pd, va); if (pg != 0) { err = 0; /* The PTE should never be already set nor present in the -- 2.13.3