Received: by 2002:ac0:a582:0:0:0:0:0 with SMTP id m2-v6csp3357313imm; Fri, 19 Oct 2018 09:15:28 -0700 (PDT) X-Google-Smtp-Source: ACcGV618X5HYCmkJqwUlX/b8FlynAxJGawsy+YFK8i1lBI89wFf/rzQockPbaLTGfAP1pYXnmF6W X-Received: by 2002:a17:902:369:: with SMTP id 96-v6mr34327367pld.36.1539965728896; Fri, 19 Oct 2018 09:15:28 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1539965728; cv=none; d=google.com; s=arc-20160816; b=jRpWYcwaXd7uN8dOB94fGthlGcOGtrHvsX3Tnbro1o98KpN+AAXEEfaA7n/4YrLcIU YIIVb/8PHTrSMQo5zTTcGutRfge3Obxv/u33FFLnP2fQRUjHgqNe/mRcU8sv5lmJsGva E7y7KylhBPszWVEI2/JtKQwUiCzWJzY6rQ+/0++djDNPUGyplRmJoa936fH610rVt4YP m5mtJA71Y6Z+qY1aC7EwdGV5CLyakVIy9GGBHr65b7Jll8/Akz6Ht/0lsmydlpsqLFE+ qR+VqYd0HJfBWHH7YsX/kW5hAYit84Qqc7gzAPdzYROt7t+eSKTYDe7U9HO24KFKIrN4 MYjA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding :content-language:in-reply-to:mime-version:user-agent:date :message-id:from:references:cc:to:subject; bh=9CNBRZ/l14OLxX6RiwMV5A6XHErJSThlEHujjVptdf0=; b=xbwGjBg+yEMyPZsdA+Wzrm0U/90Pgqdmf3XKs8C4LXs2Nxlq72S3e2GpKnJZPhvqD1 PtcNBqCQ2j4qWiJ1+pziNpNL1ghh8ICXWdhmr+zC/zVPwMpg3JaTDNd+CjzYkTrEy0wf AhlPKQr+Oz+wa5jQD+FrxZ8ULuTq1n+0kjt6uUi7A5ixD0Hc2VcMN74F4LCKxvH5qFB+ nnT6KnNsPdTK/qTRGTYM1qKqFt5jm2Q1kUNJXZRQSKPSxiieYtcimBxQs75/WZDj1Z3n +wiERS6vEawQ/by37/brPZFs6Fnv8mrTNoGBpxBxqMTucsjrusB9VbW+uM4VZHT1PijS AEGA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id j186-v6si23911356pge.117.2018.10.19.09.15.13; Fri, 19 Oct 2018 09:15:28 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727770AbeJTATt (ORCPT + 99 others); Fri, 19 Oct 2018 20:19:49 -0400 Received: from mail-sh2.amlogic.com ([58.32.228.45]:6494 "EHLO mail-sh2.amlogic.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727282AbeJTATt (ORCPT ); Fri, 19 Oct 2018 20:19:49 -0400 Received: from [192.168.0.111] (223.166.104.93) by mail-sh2.amlogic.com (10.18.11.6) with Microsoft SMTP Server (TLS) id 15.0.1320.4; Sat, 20 Oct 2018 00:12:53 +0800 Subject: Re: [PATCH v5 3/3] clk: meson: add sub MMC clock controller driver To: Stephen Boyd , Jerome Brunet , Neil Armstrong CC: Yixun Lan , Kevin Hilman , Carlo Caione , Michael Turquette , Rob Herring , Miquel Raynal , Boris Brezillon , Martin Blumenstingl , Liang Yang , Jian Hu , Qiufang Dai , Hanjie Lin , Victor Wan , , , , References: <1539839245-13793-1-git-send-email-jianxin.pan@amlogic.com> <1539839245-13793-4-git-send-email-jianxin.pan@amlogic.com> <153988282130.5275.17528969137837015544@swboyd.mtv.corp.google.com> From: Jianxin Pan Message-ID: <01d07c83-b17e-70b5-6e9b-8150ee3aedf2@amlogic.com> Date: Sat, 20 Oct 2018 00:12:53 +0800 User-Agent: Mozilla/5.0 (Windows NT 10.0; WOW64; rv:60.0) Gecko/20100101 Thunderbird/60.2.1 MIME-Version: 1.0 In-Reply-To: <153988282130.5275.17528969137837015544@swboyd.mtv.corp.google.com> Content-Type: text/plain; charset="utf-8" Content-Language: en-US Content-Transfer-Encoding: 8bit X-Originating-IP: [223.166.104.93] X-ClientProxiedBy: mail-sh2.amlogic.com (10.18.11.6) To mail-sh2.amlogic.com (10.18.11.6) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 2018/10/19 1:13, Stephen Boyd wrote: > Quoting Jianxin Pan (2018-10-17 22:07:25) >> diff --git a/drivers/clk/meson/clk-regmap.c b/drivers/clk/meson/clk-regmap.c >> index 305ee30..f96314d 100644 >> --- a/drivers/clk/meson/clk-regmap.c >> +++ b/drivers/clk/meson/clk-regmap.c >> @@ -113,8 +113,25 @@ static int clk_regmap_div_set_rate(struct clk_hw *hw, unsigned long rate, >> clk_div_mask(div->width) << div->shift, val); >> }; >> >> -/* Would prefer clk_regmap_div_ro_ops but clashes with qcom */ >> +static void clk_regmap_div_init(struct clk_hw *hw) >> +{ >> + struct clk_regmap *clk = to_clk_regmap(hw); >> + struct clk_regmap_div_data *div = clk_get_regmap_div_data(clk); >> + unsigned int val; >> + int ret; >> + >> + ret = regmap_read(clk->map, div->offset, &val); >> + if (ret) >> + return; >> >> + val &= (clk_div_mask(div->width) << div->shift); >> + if (!val) >> + regmap_update_bits(clk->map, div->offset, >> + clk_div_mask(div->width) << div->shift, >> + clk_div_mask(div->width)); >> +} >> + >> +/* Would prefer clk_regmap_div_ro_ops but clashes with qcom */ > > We should add a patch to rename the symbol for qcom, i.e. > qcom_clk_regmap_div_ro_ops, and then any symbols in this directory > should be meson_clk_regmap_div_ro_ops. "/* Would prefer clk_regmap_div_ro_ops but clashes with qcom */" This comment is not introduced in this patch. I followed the naming style in this file and add clk_regmap_divider_with_init_ops. @Jerome, What's your suggestion about this? > > Or we should just give up and squash the regmap implementations together > into a new clk_regmap set of ops. > >> const struct clk_ops clk_regmap_divider_ops = { >> .recalc_rate = clk_regmap_div_recalc_rate, >> .round_rate = clk_regmap_div_round_rate, >> diff --git a/drivers/clk/meson/mmc-clkc.c b/drivers/clk/meson/mmc-clkc.c >> new file mode 100644 >> index 0000000..5555e3f >> --- /dev/null >> +++ b/drivers/clk/meson/mmc-clkc.c >> @@ -0,0 +1,296 @@ >> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) >> +/* >> + * Amlogic Meson MMC Sub Clock Controller Driver >> + * >> + * Copyright (c) 2017 Baylibre SAS. >> + * Author: Jerome Brunet >> + * >> + * Copyright (c) 2018 Amlogic, inc. >> + * Author: Yixun Lan >> + */ >> + >> +#include > > clk-provider.h instead of clk.h? OK. > >> +#include >> +#include >> +#include >> +#include >> +#include >> +#include >> +#include >> + >> + > [...] >> + >> +static struct clk_regmap * >> +mmc_clkc_register_clk_with_parent(struct device *dev, struct regmap *map, >> + char *suffix, const char *parent, >> + unsigned long flags, >> + const struct clk_ops *ops, void *data) >> +{ >> + struct clk_init_data init; >> + struct clk_regmap *clk; >> + >> + init.ops = ops; >> + init.flags = flags; >> + init.parent_names = (const char* const []){ parent, }; > > Can't we just assign &parent here? OK. I will fix it in the next version. > >> + init.num_parents = 1; >> + >> + clk = mmc_clkc_register_clk(dev, map, &init, suffix, data); >> + if (IS_ERR(clk)) >> + dev_err(dev, "Core %s clock registration failed\n", suffix); >> + >> + return clk; >> +} >> + >> +static int mmc_clkc_probe(struct platform_device *pdev) >> +{ >> + struct clk_hw_onecell_data *onecell_data; >> + struct device *dev = &pdev->dev; >> + struct mmc_clkc_data *data; >> + struct regmap *map; >> + struct clk_regmap *mux, *div, *core, *rx, *tx; >> + >> + data = (struct mmc_clkc_data *)of_device_get_match_data(dev); > > Nitpick: Drop the cast. OK. I will drop it. Thanks for the review. > >> + if (!data) >> + return -ENODEV; >> + >> + map = syscon_node_to_regmap(dev->of_node); > > . >