Received: by 2002:ac0:a582:0:0:0:0:0 with SMTP id m2-v6csp3395735imm; Fri, 19 Oct 2018 09:52:47 -0700 (PDT) X-Google-Smtp-Source: ACcGV60ghsR9WIax7VTLaDShyeQC8Y+sIu08qGtxhuUWgE5QQWi8X8/qzkb59mgkS+z8yjCFwqPL X-Received: by 2002:a63:2105:: with SMTP id h5-v6mr21746084pgh.416.1539967967718; Fri, 19 Oct 2018 09:52:47 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1539967967; cv=none; d=google.com; s=arc-20160816; b=a4TPL+tG8M0FkA93bm3+95A7vSNNdin3zri/vsqMAq92qQ7z9TEdwPsZtxSGMW2LXo E4mB+gBg2Sp7EKmuc41Y0nAZe0/beWxKY1zhy6BDqy1AT061soICCAswTEYxez3jgQkV tJppM9CNmq/5gQrI3nVttECN37edJ7p3WdFWtGEc38bqUAURUmPKwnFu0ZcXuKmKcsZE AbnkiuDk0KpRF2NW0Fak2pCXtUYfcYP6oYJDCalkiNWy+S4rCg588Es22/tjtH9M6APj ww8icGGeUvsiqAupV5dbzRbqLPIKIOIcTZjCykJCoxeRE2NopCIqyivevefrgUGlMMrt eXZA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :message-id:to:from:cc:in-reply-to:subject:date:dkim-signature; bh=GVBU39LMN0G5blxzn+JVWLJqFsYI8KTtP2mkWhEjBzM=; b=giA0LWctKVJAu9QGqfg37WGWFAAcNcLbppSePOdRQjPwwMYes1JhGf0Px3ODt6Uxs/ ZCAhnoYpaALZKgEnw4ovBSqekVmunkFVayuKYcVhKDg8P3wPZL1sltldUDaBj8EEZJ5J UQB2NGjtk7XWHtZpZYT6mIluxvQ2LrCnMHj5w7+e+wsIbHi4XBiShg/KHYVxo8JEtKli 6xpli0u6xOM0El7E2xZwRMtWncLWLLVugCXJGm5hiuoXlcP1D28z9Vr+9zJ7rOL5mmph BTzkIxW3N3puWisrirQQoQWmTzotWiGjhgpETTcfufB3+SMLsZEl/6/XKJ8zJEThH/Vy qqVA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@sifive.com header.s=google header.b=U1nLwGYd; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id w18-v6si25373206pfg.70.2018.10.19.09.52.32; Fri, 19 Oct 2018 09:52:47 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@sifive.com header.s=google header.b=U1nLwGYd; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727883AbeJTA6z (ORCPT + 99 others); Fri, 19 Oct 2018 20:58:55 -0400 Received: from mail-pf1-f194.google.com ([209.85.210.194]:38758 "EHLO mail-pf1-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727771AbeJTA6z (ORCPT ); Fri, 19 Oct 2018 20:58:55 -0400 Received: by mail-pf1-f194.google.com with SMTP id f29-v6so16742674pff.5 for ; Fri, 19 Oct 2018 09:52:01 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sifive.com; s=google; h=date:subject:in-reply-to:cc:from:to:message-id:mime-version :content-transfer-encoding; bh=GVBU39LMN0G5blxzn+JVWLJqFsYI8KTtP2mkWhEjBzM=; b=U1nLwGYdAvV0rwH8h2ArpUg4Zar8WWuniQUvRVkEyuobx0Lvj2b3UfRK2cR0NryKSg tXg0U4Z39BswpgWFeFkLOWIZk+EfbDVczIJacL7BsEoO72Q2NthF0fGyIOZO1r/DQOLA vF5Nw6aZNIdCzUSYen5YJoOLykYo2udIQjnS9vsCGTNC968BywhADqdiI0EtEoDloBE3 6RfvVEoQl2Wud0t+hEW37D8CygbnBOlL5FdxTDwebNpJSKyQk4pFTKLmu1Y2SVjRfUsy yEIG1ELyH9qDEKhMpH+ZvNbZSQMdwZq43r0MaLr2x50KitPo3SwROP7N8Ek0//+Mya4s 1Z5g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:subject:in-reply-to:cc:from:to:message-id :mime-version:content-transfer-encoding; bh=GVBU39LMN0G5blxzn+JVWLJqFsYI8KTtP2mkWhEjBzM=; b=oqDo/W+3qtULM7kQNIxzcv/jvIhERs4t5/Tjapqz3YQburYpnjqlomZYM1YW69oRtS gCYvNex7OO/1HAt78O0cMGiHR0BchGrRAciqmXwVBpjWjWEHEmO1XPfA5a8qZHi/a6sq +pqKDsm0HTYgNzQ0GVzFhE5V2kB+5MP7ABf9b1woHpEIjXmXrXmT1INrZXguscHzhGMb yqtxcteybWdNw9GNSTBU+JOg3WDcoTuQBRRkuFLnacoKtC6CE0XphivI309SpSGjSQvE /DxQr+DyKbUx1v05QtLVxwoFl6vGIXuztNgB8ShIaZ37JvLEeso53fYt54HKR7OV0lnk yuog== X-Gm-Message-State: ABuFfoimCOvngKvC9HGGiwrFSw233WSw5aavkr/l0xfzRtye7dKDaw+P 8pMHp3VYacJCUabHRzTFHHY2zA== X-Received: by 2002:a63:844:: with SMTP id 65-v6mr32480005pgi.144.1539967920774; Fri, 19 Oct 2018 09:52:00 -0700 (PDT) Received: from localhost ([12.206.222.5]) by smtp.gmail.com with ESMTPSA id t22-v6sm33978608pfk.141.2018.10.19.09.51.59 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 19 Oct 2018 09:51:59 -0700 (PDT) Date: Fri, 19 Oct 2018 09:51:59 -0700 (PDT) X-Google-Original-Date: Fri, 19 Oct 2018 08:30:45 PDT (-0700) Subject: Re: [PATCH 1/2] dt-bindings: serial: add documentation for the SiFive UART driver In-Reply-To: <20181018234352.26788-2-paul.walmsley@sifive.com> CC: linux-serial@vger.kernel.org, Paul Walmsley , devicetree@vger.kernel.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, Greg KH , robh+dt@kernel.org, mark.rutland@arm.com, paul@pwsan.com From: Palmer Dabbelt To: Paul Walmsley Message-ID: Mime-Version: 1.0 (MHng) Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, 18 Oct 2018 16:43:53 PDT (-0700), Paul Walmsley wrote: > Add DT binding documentation for the Linux driver for the SiFive > asynchronous serial IP block. Nothing too exotic. > > Cc: linux-serial@vger.kernel.org > Cc: devicetree@vger.kernel.org > Cc: linux-riscv@lists.infradead.org > Cc: linux-kernel@vger.kernel.org > Cc: Greg Kroah-Hartman > Cc: Rob Herring > Cc: Mark Rutland > Cc: Palmer Dabbelt > Signed-off-by: Paul Walmsley > Signed-off-by: Paul Walmsley > --- > .../bindings/serial/sifive-serial.txt | 21 +++++++++++++++++++ > 1 file changed, 21 insertions(+) > create mode 100644 Documentation/devicetree/bindings/serial/sifive-serial.txt > > diff --git a/Documentation/devicetree/bindings/serial/sifive-serial.txt b/Documentation/devicetree/bindings/serial/sifive-serial.txt > new file mode 100644 > index 000000000000..8982338512f5 > --- /dev/null > +++ b/Documentation/devicetree/bindings/serial/sifive-serial.txt > @@ -0,0 +1,21 @@ > +SiFive asynchronous serial interface (UART) > + > +Required properties: > + > +- compatible: should be "sifive,fu540-c000-uart0" or "sifive,uart0" > +- reg: address and length of the register space > +- interrupt-parent: should contain a phandle pointing to the SoC interrupt > + controller device node that the UART interrupts are connected to > +- interrupts: Should contain the UART interrupt identifier > +- clocks: Should contain a clock identifier for the UART's parent clock > + > + > +Example: > + > +uart0: serial@10010000 { > + compatible = "sifive,uart0"; > + interrupt-parent = <&plic0>; > + interrupts = <80>; > + reg = <0x0 0x10010000 0x0 0x1000>; > + clocks = <&prci PRCI_CLK_TLCLK>; > +}; Reviewed-by: Palmer Dabbelt