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[209.132.180.67]) by mx.google.com with ESMTP id z9-v6si32595892pgh.213.2018.10.21.23.12.34; Sun, 21 Oct 2018 23:12:49 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727620AbeJVOWz (ORCPT + 99 others); Mon, 22 Oct 2018 10:22:55 -0400 Received: from mail-sh2.amlogic.com ([58.32.228.45]:46184 "EHLO mail-sh2.amlogic.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727322AbeJVOWz (ORCPT ); Mon, 22 Oct 2018 10:22:55 -0400 Received: from [10.18.29.185] (10.18.29.185) by mail-sh2.amlogic.com (10.18.11.6) with Microsoft SMTP Server (TLS) id 15.0.1320.4; Mon, 22 Oct 2018 14:05:48 +0800 Subject: Re: [PATCH v5 2/3] clk: meson: add DT documentation for emmc clock controller To: Stephen Boyd , Jerome Brunet , Neil Armstrong CC: Yixun Lan , Kevin Hilman , Carlo Caione , Michael Turquette , Rob Herring , Miquel Raynal , Boris Brezillon , Martin Blumenstingl , Liang Yang , Jian Hu , Qiufang Dai , Hanjie Lin , Victor Wan , , , , References: <1539839245-13793-1-git-send-email-jianxin.pan@amlogic.com> <1539839245-13793-3-git-send-email-jianxin.pan@amlogic.com> <153988248599.5275.8444799485095155762@swboyd.mtv.corp.google.com> <153997224756.53599.3138050846693192599@swboyd.mtv.corp.google.com> From: Jianxin Pan Message-ID: <2a3890e2-10a7-ef0a-637d-af980d495606@amlogic.com> Date: Mon, 22 Oct 2018 14:05:48 +0800 User-Agent: Mozilla/5.0 (Windows NT 10.0; WOW64; rv:60.0) Gecko/20100101 Thunderbird/60.2.1 MIME-Version: 1.0 In-Reply-To: <153997224756.53599.3138050846693192599@swboyd.mtv.corp.google.com> Content-Type: text/plain; charset="utf-8" Content-Language: en-US Content-Transfer-Encoding: 7bit X-Originating-IP: [10.18.29.185] X-ClientProxiedBy: mail-sh2.amlogic.com (10.18.11.6) To mail-sh2.amlogic.com (10.18.11.6) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Stephen, Thanks for the fully review, we really appreciate your time. Please see my comments below. On 2018/10/20 2:04, Stephen Boyd wrote: > Quoting Jianxin Pan (2018-10-19 08:50:08) >> On 2018/10/19 1:08, Stephen Boyd wrote: >>> Quoting Jianxin Pan (2018-10-17 22:07:24) >>>> diff --git a/Documentation/devicetree/bindings/clock/amlogic,mmc-clkc.txt b/Documentation/devicetree/bindings/clock/amlogic,mmc-clkc.txt >>>> new file mode 100644 >>>> index 0000000..9e6d343 >>>> --- /dev/null >>>> +++ b/Documentation/devicetree/bindings/clock/amlogic,mmc-clkc.txt >>>> @@ -0,0 +1,31 @@ >>>> +* Amlogic MMC Sub Clock Controller Driver >>>> + >>>> +The Amlogic MMC clock controller generates and supplies clock to support >>>> +MMC and NAND controller >>>> + >>>> +Required Properties: >>>> + >>>> +- compatible: should be: >>>> + "amlogic,gx-mmc-clkc" >>>> + "amlogic,axg-mmc-clkc" >>>> + >>>> +- #clock-cells: should be 1. >>>> +- clocks: phandles to clocks corresponding to the clock-names property >>>> +- clock-names: list of parent clock names >>>> + - "clkin0", "clkin1" >>>> + >>>> +Parent node should have the following properties : >>> >>> The example only has one node. Can you add two nodes? >> OK. This clock is used by nand and emmc. I will add a new example for emmc too. >> Thank you for your review. > > Maybe I misunderstand. I thought the clk controller was two nodes, but > it isn't? This wording is trying to explain what a consumer should look > like? > Yes.There is another clk controller. I will add it in the next version. sd_emmc_b_clkc: clock-controller@5000 { compatible = "amlogic,axg-mmc-clkc", "syscon"; reg = <0x0 0x5000 0x0 0x4>; #clock-cells = <1>; clock-names = "clkin0", "clkin1"; clocks = <&clkc CLKID_SD_EMMC_B_CLK0>, <&clkc CLKID_FCLK_DIV2>; }; sd_emmc_c_clkc is for nadn and mmc portC. sd_emmc_b_clkc is for mmc portB. > . >