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[209.132.180.67]) by mx.google.com with ESMTP id y66-v6si32947204pgy.496.2018.10.22.06.35.58; Mon, 22 Oct 2018 06:36:24 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728279AbeJVVeK convert rfc822-to-8bit (ORCPT + 99 others); Mon, 22 Oct 2018 17:34:10 -0400 Received: from mx01.busymouse24.de ([83.246.107.19]:47628 "EHLO mx01.busymouse24.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727669AbeJVVeK (ORCPT ); Mon, 22 Oct 2018 17:34:10 -0400 Received: from maskedhost [127.0.0.1] by mx01.busymouse24.de stage1 with esmtps (Exim MailCleaner) id 1gEa3U-000944-F1 from ; Mon, 22 Oct 2018 15:15:36 +0200 Received: from SRV188.busymouse24.de (192.168.100.188) by SRV177.busymouse24.de (192.168.100.177) with Microsoft SMTP Server (TLS) id 15.0.1263.5; Mon, 22 Oct 2018 15:15:35 +0200 Received: from SRV177.busymouse24.de (192.168.100.177) by SRV188.busymouse24.de (192.168.100.188) with Microsoft SMTP Server (TLS) id 15.0.1263.5; Mon, 22 Oct 2018 15:15:35 +0200 Received: from SRV177.busymouse24.de ([fe80::f87a:2c8c:90ef:d29a]) by SRV177.busymouse24.de ([fe80::f87a:2c8c:90ef:d29a%14]) with mapi id 15.00.1263.000; Mon, 22 Oct 2018 15:15:35 +0200 From: Andreas Puhm To: Moritz Fischer CC: Alan Tull , "linux-fpga@vger.kernel.org" , "linux-kernel@vger.kernel.org" Subject: [PATCH] fpga: altera_cvp: restrict registration to CvP enabled devices Thread-Topic: [PATCH] fpga: altera_cvp: restrict registration to CvP enabled devices Thread-Index: AdRqCJx8+DqNmFX1QmK8kME9tbGkZQ== Date: Mon, 22 Oct 2018 13:15:34 +0000 Message-ID: <78c44ad0b2344a4490ffd300cf0df746@SRV177.busymouse24.de> Accept-Language: de-AT, de-DE, en-US Content-Language: de-DE X-MS-Has-Attach: X-MS-TNEF-Correlator: x-ms-exchange-transport-fromentityheader: Hosted x-originating-ip: [83.246.107.135] x-exclaimer-md-config: 1802f3fe-bc94-4301-9dc2-d59a74e6de3a Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 8BIT MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Moritz, Thank you, for your fast response! Below you can find the updated patch. -------------------------------------------------------------------- Full description: The altera_cvp probe function only checks, if the Altera/Intel PCI device configuration space contains a vendor specific entry (VSEC Capability Header 0x000b) at offset 0x200. But the probe function does not verify, if the PCI device (and further the FPGA), for which it has been called, actually supports the Configure-via-Protocol feature. The PCI device (FPGA) can explicitly disable the Configur-via-Protocol (CvP) feature by setting the CVP_EN bit, index 20 of CVP_STATUS register, to '0'. As the altera_cvp probe function does not check this it registers the device in any way. At this point, the altera_cvp module cannot be used to program this device via CvP. In addition no other module can use the device, as it is still registered by altera_cvp. Keywords: altera_cvp module, PCI, Configure-via-Protocol Kernel version: problem occured with v4.15, should occur from 4.14+ Instructions to reproduce: Proper hardware is necessary to reproduce this, i.e., FPGA with instantiated Altera/Intel PCIe IP Core with disabled CvP feature. Workaround: It is possible to circumvent this problem by manually unloading or blacklisting the altera_cvp module. -------------------------------------------------------------------- Suggested Patch: This patch was successfully build and tested for 4.15 and 4.18 The patch is based on: git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tag/?h=v4.18 Subject: [PATCH] fpga: altera_cvp: restrict registration to CvP enabled devices The altera-cvp probe function now verifies, that the PCI device supports the CvP feature, before it registers the device. This is done by reading the CVP_EN bit, Bit 20 of the CVP_STATUS register (@ PCI Config Address 0x21C). If this bit is '1' (CvP enabled), altera-cvp will register the device for further interaction. If this bit is '0' (CvP disabled), altera-cvp will not register the device. Signed-off-by: Andreas Puhm --- drivers/fpga/altera-cvp.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/drivers/fpga/altera-cvp.c b/drivers/fpga/altera-cvp.c index 7fa793672a7a..838abcfca0fb 100644 --- a/drivers/fpga/altera-cvp.c +++ b/drivers/fpga/altera-cvp.c @@ -403,6 +403,7 @@ static int altera_cvp_probe(struct pci_dev *pdev, struct altera_cvp_conf *conf; struct fpga_manager *mgr; u16 cmd, val; + u32 val32; int ret; /* @@ -416,6 +417,14 @@ static int altera_cvp_probe(struct pci_dev *pdev, return -ENODEV; } + pci_read_config_dword(pdev, VSE_CVP_STATUS, &val32); + if (!(val32 & VSE_CVP_STATUS_CVP_EN)) { + dev_err(&pdev->dev, + "CVP is disabled for this device: CVP_STATUS Reg 0x%x\n", + val32); + return -ENODEV; + } + conf = devm_kzalloc(&pdev->dev, sizeof(*conf), GFP_KERNEL); if (!conf) return -ENOMEM; -- With best regards, Andreas Puhm