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[209.132.180.67]) by mx.google.com with ESMTP id c81-v6si37952662pfb.153.2018.10.22.13.41.39; Mon, 22 Oct 2018 13:41:54 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@oracle.com header.s=corp-2018-07-02 header.b=iOH0msCm; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=oracle.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728944AbeJWE7i (ORCPT + 99 others); Tue, 23 Oct 2018 00:59:38 -0400 Received: from userp2130.oracle.com ([156.151.31.86]:59126 "EHLO userp2130.oracle.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726082AbeJWE7i (ORCPT ); Tue, 23 Oct 2018 00:59:38 -0400 Received: from pps.filterd (userp2130.oracle.com [127.0.0.1]) by userp2130.oracle.com (8.16.0.22/8.16.0.22) with SMTP id w9MKYExV053497; Mon, 22 Oct 2018 20:39:06 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oracle.com; h=subject : to : cc : references : from : message-id : date : mime-version : in-reply-to : content-type : content-transfer-encoding; s=corp-2018-07-02; bh=XHyNwLF3WfJn2+I4lLilabah77XmtUREkOx8TPwzgt8=; b=iOH0msCmciwQni/yrzeU8uC5NcfxgFSTcHlkg723A+Ip5kK7z+fhUJ7e/f2UDKUEaNgu Q08EeQrggYl5U2Zn6gpM7eZgwbivFgAnP0qSxOps4yOvUYhsU1h7kCBK0vfq7jHia0yD RTgS7BaF0IC2s3D04pqj1e1JKws6bURCalsAkVwtQ3hXwvJ92PZiSNLUX4zYwX35gKhK q52sYp7TP6jJKzbDoby2XdIsxO8Fa+/Sh89yQ1UwsPlciR2C5OIsEjfLyL068vHRVbII JQQmEOhVjIrsL74a3ETm4mqvpEZ7p67DbGd/889BE6uu1pcDiKkDRiVT2mj7u6s2nTPi Pw== Received: from userv0021.oracle.com (userv0021.oracle.com [156.151.31.71]) by userp2130.oracle.com with ESMTP id 2n7usu13kg-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Mon, 22 Oct 2018 20:39:05 +0000 Received: from userv0121.oracle.com (userv0121.oracle.com [156.151.31.72]) by userv0021.oracle.com (8.14.4/8.14.4) with ESMTP id w9MKd5d5020189 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Mon, 22 Oct 2018 20:39:05 GMT Received: from abhmp0017.oracle.com (abhmp0017.oracle.com [141.146.116.23]) by userv0121.oracle.com (8.14.4/8.13.8) with ESMTP id w9MKd4KN012901; Mon, 22 Oct 2018 20:39:04 GMT Received: from [10.209.243.127] (/10.209.243.127) by default (Oracle Beehive Gateway v4.0) with ESMTP ; Mon, 22 Oct 2018 13:39:03 -0700 Subject: Re: [PATCH v2 00/10] Add support for TISCI irqchip drivers To: Lokesh Vutla , Nishanth Menon , Rob Herring , tglx@linutronix.de, jason@lakedaemon.net, marc.zyngier@arm.com Cc: Santosh Shilimkar , Linux ARM Mailing List , linux-kernel@vger.kernel.org, Tero Kristo , Sekhar Nori , Device Tree Mailing List , Grygorii Strashko , Peter Ujfalusi References: <20181018154017.7112-1-lokeshvutla@ti.com> From: Santosh Shilimkar Organization: Oracle Corporation Message-ID: <942981b8-7536-2b6b-ad49-dc59671cbda6@oracle.com> Date: Mon, 22 Oct 2018 13:39:02 -0700 User-Agent: Mozilla/5.0 (Windows NT 6.1; WOW64; rv:52.0) Gecko/20100101 Thunderbird/52.9.1 MIME-Version: 1.0 In-Reply-To: <20181018154017.7112-1-lokeshvutla@ti.com> Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit X-Proofpoint-Virus-Version: vendor=nai engine=5900 definitions=9054 signatures=668683 X-Proofpoint-Spam-Details: rule=notspam policy=default score=0 suspectscore=0 malwarescore=0 phishscore=0 bulkscore=0 spamscore=0 mlxscore=0 mlxlogscore=752 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1807170000 definitions=main-1810220175 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 10/18/2018 8:40 AM, Lokesh Vutla wrote: > TISCI abstracts the handling of IRQ routes where interrupt sources > are not directly connected to host interrupt controller. This series > adds support for: > - TISCI commands needed for IRQ configuration > - Interrupt Router(INTR) and Interrupt Aggregator(INTA) drivers > > More information on TISCI IRQ management can be found here[1]. > Complete TISCI resource management information can be found here[2]. > AM65x SoC related TISCI information can be found here[3]. > INTR and INTA related information can be found in TRM[4]. > I didn't read the specs but from what you described in INTA and INTR bindings, does the flow of IRQs like below ? Device IRQ(e.g USB) -->INTR-->INTA--->HOST IRQ controller(GIC) The confusing part is aggregator and can multiplex as well as grouping but seems like its event grouping or multiplexing than actual device IRQ grouping or multi-plexsing. What am I missing ? Regards,S antosh