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Wong" , Eric Sandeen , Arnd Bergmann , Wu Hao , Tomohiro Kusumi , "Bryant G . Ly" , Frederic Barrat , "David S . Miller" , Mauro Carvalho Chehab , Andrew Morton , Randy Dunlap , Philippe Ombredanne , Vinod Koul , Stephen Boyd , David Kershner , Uwe Kleine-Konig , Sagar Dharia , Johan Hovold , Thomas Gleixner , Juergen Gross , Cyrille Pitchen , linux-hwmon@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-aspeed@lists.ozlabs.org, linux-doc@vger.kernel.org, openbmc@lists.ozlabs.org, James Feist , Jason M Biils , Vernon Mauery Subject: Re: [PATCH v8 07/12] dt-bindings: mfd: Add a document for PECI client MFD Message-ID: <20181024072540.GA4939@dell> References: <20180918215124.14003-1-jae.hyun.yoo@linux.intel.com> <20180918215124.14003-8-jae.hyun.yoo@linux.intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20180918215124.14003-8-jae.hyun.yoo@linux.intel.com> User-Agent: Mutt/1.9.4 (2018-02-28) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, 18 Sep 2018, Jae Hyun Yoo wrote: > This commit adds a dt-bindings document for PECI client MFD. > > Cc: Lee Jones > Cc: Rob Herring > Cc: Mark Rutland > Cc: Andrew Jeffery > Cc: James Feist > Cc: Jason M Biils > Cc: Joel Stanley > Cc: Vernon Mauery > Signed-off-by: Jae Hyun Yoo > --- > .../bindings/mfd/intel-peci-client.txt | 34 +++++++++++++++++++ > 1 file changed, 34 insertions(+) > create mode 100644 Documentation/devicetree/bindings/mfd/intel-peci-client.txt > > diff --git a/Documentation/devicetree/bindings/mfd/intel-peci-client.txt b/Documentation/devicetree/bindings/mfd/intel-peci-client.txt > new file mode 100644 > index 000000000000..cb341e363add > --- /dev/null > +++ b/Documentation/devicetree/bindings/mfd/intel-peci-client.txt > @@ -0,0 +1,34 @@ > +* Intel PECI client bindings > + > +PECI (Platform Environment Control Interface) is a one-wire bus interface that > +provides a communication channel from PECI clients in Intel processors and > +chipset components to external monitoring or control devices. PECI is designed > +to support the following sideband functions: > + > +- Processor and DRAM thermal management > +- Platform Manageability > +- Processor Interface Tuning and Diagnostics > +- Failure Analysis > + > +Required properties: > +- compatible : Should be "intel,peci-client". > +- reg : Should contain address of a client CPU. Address range of CPU > + clients starts from 0x30 based on PECI specification. Nit: "start" Would be better worded: "According to the PECI specification client addresses start from 0x30." > +Example: > + peci-bus@0 { > + compatible = "vendor,soc-peci"; > + reg = <0x0 0x1000>; > + #address-cells = <1>; > + #size-cells = <0>; > + > + peci-client@30 { > + compatible = "intel,peci-client"; > + reg = <0x30>; > + }; > + > + peci-client@31 { > + compatible = "intel,peci-client"; > + reg = <0x31>; > + }; > + }; -- Lee Jones [李琼斯] Linaro Services Technical Lead Linaro.org │ Open source software for ARM SoCs Follow Linaro: Facebook | Twitter | Blog