Received: by 2002:ac0:aa62:0:0:0:0:0 with SMTP id w31-v6csp1544265ima; Thu, 25 Oct 2018 00:30:43 -0700 (PDT) X-Google-Smtp-Source: AJdET5c6LTjUsZ3iZCs+pBGcoKEfD98MRkXJleACFPsE980A96t4umEB1X8+EB5PMG89PDHvHpOf X-Received: by 2002:a17:902:7c8a:: with SMTP id y10-v6mr430649pll.322.1540452643717; Thu, 25 Oct 2018 00:30:43 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1540452643; cv=none; d=google.com; s=arc-20160816; b=yb2RYQCVS7FvYTdhl1TrXrrLPJM7lI3vp1J53G4BLg5I1DisYB/1ZoBzxcXYR4fcV5 1GaOBwNahlefXbhpOhk1MKgye4NevuTsDIxYEJDLTjtKJKElo0rAMEDdWMWZVHhgUjS1 zgOFSi0bhtHoR8HsymvlpQcwomYqtG0OWOYhbHqCCOde3Ooto7pGwiHhAduYVgtB4+Cu Pz+G+OGK23EGHqmn6HA+NGwyIlqISt8swpXn/BM0Sdk8QVSSKXYtE5325XwevpWaUVjU AbMtsrutg0rvpj6Q1eqKkdi6/EdNbZwN9XHRy4SAnAkAms2DtZstpj3Lo1CNRmleXZlB zikQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:user-agent:in-reply-to :content-disposition:mime-version:references:message-id:subject:cc :to:from:date; bh=72aGRaK4PfqvlF0kH/QlJts6knUVPzhfLbEkXGfIoBA=; b=vC8mPBDw1fhxNQgSkAJnDyY6XjVA5yrpcCSLsulyzYXVM8tgLvVi3XypZEuYjoGzVG rGDz2JNNvVhY1v14+Skq8VIcpJPV8moEfS13NB58j4KwsYuqz5qylQshtHrOuCJGf/Nc V4Frbw0WliBq0ARBbogKhCPwP6Mx/TsMfeTDVC7evM8S1sdM5BxKA0EpjIvd7/RYNpGP 94yf9TXmc3ckesv+nmo7l6r13ubrI8Q/+739omKFt8CGnEAv0gl+QLs2+Wu0YIL61wWS q7VD516tvvRrdpWEmoEiZbQYE39n3DgBKTZ9Q//1JtwKWYmaFUCzxjM0Z0znB0MqF44V FzFg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=gentoo.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id a5-v6si6988584plp.261.2018.10.25.00.30.28; Thu, 25 Oct 2018 00:30:43 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=gentoo.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726899AbeJYQAv (ORCPT + 99 others); Thu, 25 Oct 2018 12:00:51 -0400 Received: from smtp.gentoo.org ([140.211.166.183]:35784 "EHLO smtp.gentoo.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726465AbeJYQAv (ORCPT ); Thu, 25 Oct 2018 12:00:51 -0400 Received: from localhost (unknown [116.247.178.109]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: dlan) by smtp.gentoo.org (Postfix) with ESMTPSA id EFF23335CCC; Thu, 25 Oct 2018 07:29:19 +0000 (UTC) Date: Thu, 25 Oct 2018 15:29:15 +0800 From: Yixun Lan To: Jerome Brunet Cc: Jianxin Pan , Neil Armstrong , Rob Herring , Hanjie Lin , Victor Wan , Stephen Boyd , Kevin Hilman , Michael Turquette , Yixun Lan , linux-kernel@vger.kernel.org, Boris Brezillon , Liang Yang , Jian Hu , Miquel Raynal , Carlo Caione , linux-amlogic@lists.infradead.org, Martin Blumenstingl , linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Qiufang Dai Subject: Re: [PATCH v5 2/3] clk: meson: add DT documentation for emmc clock controller Message-ID: <20181024145513.GA6647@ofant> References: <1539839245-13793-1-git-send-email-jianxin.pan@amlogic.com> <1539839245-13793-3-git-send-email-jianxin.pan@amlogic.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.10.1 (2018-07-13) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Jerome, Jianxin: see my comments On 10:58 Wed 24 Oct , Jerome Brunet wrote: > On Thu, 2018-10-18 at 13:07 +0800, Jianxin Pan wrote: > > From: Yixun Lan > > > > Document the MMC sub clock controller driver, the potential consumer > > of this driver is MMC or NAND. Also add four clock bindings IDs which > > provided by this driver. > > > > Reviewed-by: Rob Herring > > Signed-off-by: Yixun Lan > > Signed-off-by: Jianxin Pan > > --- > > .../devicetree/bindings/clock/amlogic,mmc-clkc.txt | 31 ++++++++++++++++++++++ > > include/dt-bindings/clock/amlogic,mmc-clkc.h | 17 ++++++++++++ > > 2 files changed, 48 insertions(+) > > create mode 100644 Documentation/devicetree/bindings/clock/amlogic,mmc-clkc.txt > > create mode 100644 include/dt-bindings/clock/amlogic,mmc-clkc.h > > > > diff --git a/Documentation/devicetree/bindings/clock/amlogic,mmc-clkc.txt b/Documentation/devicetree/bindings/clock/amlogic,mmc-clkc.txt > > new file mode 100644 > > index 0000000..9e6d343 > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/clock/amlogic,mmc-clkc.txt > > @@ -0,0 +1,31 @@ > > +* Amlogic MMC Sub Clock Controller Driver > > + > > +The Amlogic MMC clock controller generates and supplies clock to support > > +MMC and NAND controller > > + > > +Required Properties: > > + > > +- compatible: should be: > > + "amlogic,gx-mmc-clkc" > > + "amlogic,axg-mmc-clkc" > > + > > +- #clock-cells: should be 1. > > +- clocks: phandles to clocks corresponding to the clock-names property > > +- clock-names: list of parent clock names > > + - "clkin0", "clkin1" > > + > > +Parent node should have the following properties : > > +- compatible: "amlogic,axg-mmc-clkc", "syscon". > > +- reg: base address and size of the MMC control register space. > > I get why Stephen is confused by your description, I am too. The example > contradict the documentation. > > The documentation above says that the parent node should be a syscon with the > mmc register space. > > But your example shows this in the node itself. > yes, I think the documentation need to be fixed for the final solution, we decide to make 'mmc-clkc' an independent node instead of being a sub-node of 'mmc', so both of them may exist in parallel.. the DT part may like this: sd_emmc_c_clkc: clock-controller@7000 { compatible = "amlogic,axg-mmc-clkc", "syscon"; reg = <0x0 0x7000 0x0 0x4>; ... }; sd_emmc_c: mmc@7000 { compatible = "amlogic,axg-mmc"; reg = <0x0 0x7000 0x0 0x800>; ... }; > > + > > +Example: Clock controller node: > > + > > +sd_mmc_c_clkc: clock-controller@7000 { > > + compatible = "amlogic,axg-mmc-clkc", "syscon"; > > + reg = <0x0 0x7000 0x0 0x4>; > > + #clock-cells = <1>; > > + > > + clock-names = "clkin0", "clkin1"; > > + clocks = <&clkc CLKID_SD_MMC_C_CLK0>, > > + <&clkc CLKID_FCLK_DIV2>; > > +}; > > diff --git a/include/dt-bindings/clock/amlogic,mmc-clkc.h b/include/dt-bindings/clock/amlogic,mmc-clkc.h > > new file mode 100644 > > index 0000000..162b949 > > --- /dev/null > > +++ b/include/dt-bindings/clock/amlogic,mmc-clkc.h > > @@ -0,0 +1,17 @@ > > +/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */ > > +/* > > + * Meson MMC sub clock tree IDs > > + * > > + * Copyright (c) 2018 Amlogic, Inc. All rights reserved. > > + * Author: Yixun Lan > > + */ > > + > > +#ifndef __MMC_CLKC_H > > +#define __MMC_CLKC_H > > + > > +#define CLKID_MMC_DIV 1 > > +#define CLKID_MMC_PHASE_CORE 2 > > +#define CLKID_MMC_PHASE_TX 3 > > +#define CLKID_MMC_PHASE_RX 4 > > + > > +#endif > > > > _______________________________________________ > linux-amlogic mailing list > linux-amlogic@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-amlogic -- Yixun Lan (dlan) Gentoo Linux Developer GPG Key ID AABEFD55