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To: svendev@arcx.com Cc: Lee Jones , Rob Herring , Mark Rutland , =?UTF-8?Q?Andreas_F=C3=A4rber?= , Thierry Reding , David Lechner , =?UTF-8?Q?Noralf_Tr=C3=B8nnes?= , Johan Hovold , Michal Simek , michal.vokac@ysoft.com, Arnd Bergmann , Greg KH , john.garry@huawei.com, Andy Shevchenko , Geert Uytterhoeven , Robin Murphy , Paul Gortmaker , Sebastien Bourdelin , Icenowy Zheng , yuanzhichang@hisilicon.com, Stuart Yoder , Maxime Ripard , bogdan.purcareata@nxp.com, "linux-kernel@vger.kernel.org" , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Sven, thanks for your patch! On Wed, Oct 24, 2018 at 4:25 PM Sven Van Asbroeck wrote: > + - pwms : the pwm connected to the bridge's 'pwm input'. That is really unintuitive and needs a detailed explanation. What is a bridge doing with a PWM? Is it 100% certain this is a PWM, it's not just a .... clock? A pwm is a pule WIDTH modulator and I can't for my life understand why a bus bridge needs a signal with variable pulse width, but surprise me! :D > + fsl,weim-cs-timing = <0x024400b1 0x00001010 0x20081100 > + 0x00000000 0xa0000240 0x00000000>; Is it just a copy/paste from Documentation/devicetree/bindings/bus/imx-weim.txt leftover? It was mentioned as undocumented but it is also pretty terse with these opaque hex numbers. I would never let the Freescale binding pass if I was reviewing it. Look at my bindings for Qualcomm EBI in Documentation/devicetree/bindings/bus/qcom,ebi2.txt for example. But maybe it's not even supposed to be there. Yours, Linus Walleij