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[209.132.180.67]) by mx.google.com with ESMTP id j16-v6si8804188pgm.501.2018.10.25.04.05.57; Thu, 25 Oct 2018 04:06:16 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=PyanDqMe; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727408AbeJYTh0 (ORCPT + 99 others); Thu, 25 Oct 2018 15:37:26 -0400 Received: from mail-wm1-f67.google.com ([209.85.128.67]:33128 "EHLO mail-wm1-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727394AbeJYTh0 (ORCPT ); Thu, 25 Oct 2018 15:37:26 -0400 Received: by mail-wm1-f67.google.com with SMTP id y140-v6so1683142wmd.0 for ; Thu, 25 Oct 2018 04:05:09 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:content-transfer-encoding:in-reply-to :user-agent; bh=C0BamnOmkIohfFzvdCg9JNSKhJZ2qbMi94Zn2XJWcVk=; b=PyanDqMezCBKvgu7IrfjLlAUdZZDPKCRHrPk/MtaCldP1OjOx7Pd+P3F8OQzfaHPMu y29x5a5f+baagDk9+HrSPEqYk5tAwIvFFnVBn7V5F+urvryfecUOrvbn7QRCq2Zllp6w 5iy2hyesJJ7LwV1cd3tcUW0RFRJD7aFDSh048= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:content-transfer-encoding :in-reply-to:user-agent; bh=C0BamnOmkIohfFzvdCg9JNSKhJZ2qbMi94Zn2XJWcVk=; b=nJew4+pKYsd6foKkUGZhWswKGC/hmJkWOQmBCM1gIQvuFTdrLJlbQI6GQWCdDVXrlS zKYPqE4T1wIAG6VCfYDzN8iSBOd5kk4foE33QFFBVQRLSnzFexpIQbzr2f0KNWtQ37YD y+X8JPZsY1YL0E6YXZdm3Cvrj8ZQ6BjS/YT1M5sPEj8PfQvQNPdy14gZvxpgiSAjq7fI 0VUCmtHRR14od5J6Eh/E3O9V2SXC1EmBHhN325N3irfvFRal8nJuAAtPlrArwRSUOzPQ 1utw+t1nOK4dVuYWE2GD0MQ0kPOT6hwGxPv9JVL/V6v/JTADNeILRznW6R+q+G9QfJKI 4RnQ== X-Gm-Message-State: AGRZ1gKGxL5MxicY2uBAbu+OMwRNSCtSQZM7UBU7ZDJ5VNCWR/64xTJe WOLu2775Xq2YbxjySVhY0g2PMQ== X-Received: by 2002:a1c:3e8d:: with SMTP id l135-v6mr1371220wma.13.1540465508470; Thu, 25 Oct 2018 04:05:08 -0700 (PDT) Received: from dell ([2.31.167.182]) by smtp.gmail.com with ESMTPSA id m136-v6sm1003117wmb.4.2018.10.25.04.05.07 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 25 Oct 2018 04:05:07 -0700 (PDT) Date: Thu, 25 Oct 2018 12:05:05 +0100 From: Lee Jones To: Andy Shevchenko Cc: Dan O'Donovan , Linux Kernel Mailing List , Andy Shevchenko , Mika Westerberg , "Krogerus, Heikki" , Linus Walleij , Jacek Anaszewski , Pavel Machek , "open list:GPIO SUBSYSTEM" , Linux LED Subsystem , carlos.iglesias@emutex.com, Javier Arteaga Subject: Re: [PATCH v2 1/3] mfd: upboard: Add UP2 platform controller driver Message-ID: <20181025110505.GA4870@dell> References: <20180421085009.28773-1-javier@emutex.com> <1539969334-24577-1-git-send-email-dan@emutex.com> <1539969334-24577-2-git-send-email-dan@emutex.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: User-Agent: Mutt/1.9.4 (2018-02-28) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Sat, 20 Oct 2018, Andy Shevchenko wrote: > On Fri, Oct 19, 2018 at 8:26 PM Dan O'Donovan wrote: > > > > From: Javier Arteaga > > > > UP Squared (UP2) is a x86 SBC from AAEON based on Intel Apollo Lake. It > > features a MAX 10 FPGA that routes lines from both SoC and on-board > > devices to two I/O headers: > > > > +------------------------+ > > | 40-pin RPi-like header | > > +------| (HAT) | > > | +------------------------+ > > +-------+ +--------+ > > | | | | +------------------------+ > > | SoC |----| FPGA |-----| Custom UP2 pin header | > > | | | | | (EXHAT) | > > +-------+ +--------+ +------------------------+ > > | > > +------* On-board devices: LED, VLS... > > > > This is intended to enable vendor-specific applications to customize I/O > > header pinout, as well as include low-latency functionality. It also > > performs voltage level translation between the SoC (1.8V) and HAT header > > (3.3V). > > > > Out of the box, this block implements a platform controller with a > > GPIO-bitbanged control interface. It's enumerated by ACPI and provides > > registers to control: > > > > - Configuration of all FPGA-routed header lines. These can be driven > > SoC-to-header, header-to-SoC or set in high impedance. > > > > - On-board LEDs and enable lines for other platform devices. > > > > Add core support for this platform controller as a MFD device, exposing > > these registers as a regmap. > > Can we see a link to or an excerpt of ACPI table for this device? > > > +#define set_clear(u, x) gpiod_set_value((u)->clear_gpio, (x)) > > +#define set_strobe(u, x) gpiod_set_value((u)->strobe_gpio, (x)) > > +#define set_datain(u, x) gpiod_set_value((u)->datain_gpio, (x)) > > +#define get_dataout(u) gpiod_get_value((u)->dataout_gpio) > > I think these macros don't bring much value. (Up to you and Lee to decide) I agree. In fact I think they only serve to obfuscate instead of clarify. [...] > > + set_strobe(ddata, 0); > > + set_strobe(ddata, 1); > > + *val |= get_dataout(ddata) << i; > > + } > > +} > > > +static int upboard_check_supported(struct device *dev, struct regmap *regmap) > > +{ > > + uint8_t manufacturer_id, build, major, minor, patch; > > + unsigned int platform_id, firmware_id; > > + int ret; > > > + manufacturer_id = platform_id & 0xff; > > Redundant & 0xff part. Maybe not required, but lets the reader know it's intended. [...] > > + ret = upboard_init_gpio(dev); > > + if (ret) { > > + if (ret != -EPROBE_DEFER) > > + dev_err(dev, "failed to init GPIOs: %d", ret); > > + return ret; > > + } > > I don't know if probe_err() helper is going to be a part of v4.21 > (which this series targets), it would be good to use it. Interesting. What does it do? -- Lee Jones [李琼斯] Linaro Services Technical Lead Linaro.org │ Open source software for ARM SoCs Follow Linaro: Facebook | Twitter | Blog