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[94.230.152.15]) by smtp.gmail.com with ESMTPSA id b7-v6sm5386581edd.43.2018.10.28.22.16.08 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Sun, 28 Oct 2018 22:16:09 -0700 (PDT) Date: Mon, 29 Oct 2018 06:16:02 +0100 From: Andrea Parri To: "Paul E. McKenney" Cc: Peter Zijlstra , Josh Triplett , linux-kernel@vger.kernel.org Subject: Re: [RFR] Store tearing Message-ID: <20181029051602.GA3358@andrea> References: <20181028230627.GA3420@andrea> <20181028231003.GA4021@andrea> <20181029012042.GR4170@linux.ibm.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20181029012042.GR4170@linux.ibm.com> User-Agent: Mutt/1.9.4 (2018-02-28) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Sun, Oct 28, 2018 at 06:20:42PM -0700, Paul E. McKenney wrote: > On Mon, Oct 29, 2018 at 12:10:03AM +0100, Andrea Parri wrote: > > Hopefully, with Paul's proper email address this time, > > > > Andrea > > > > On Mon, Oct 29, 2018 at 12:06:27AM +0100, Andrea Parri wrote: > > > Hi, > > > > > > memory-barriers.txt says: > > > > > > [on "store tearing"] > > > > > > "In fact, a recent bug (since fixed) caused GCC to incorrectly use > > > this optimization in a volatile store.". > > > > > > I was wondering if you could help me retrieve some reference/discussions > > > about this? > > This was quite some time ago, but it involved a 32-bit volatile store > of a constant such as 0x10001. The machine in question had a narrow > store-immediate instruction, so the compiler emitted a pair of 16-bit > store-immediate instructions. This bug was fixed, though only after > significant screaming and shouting. That does sound like an interesting discussion. ;D Thanks for the info, Andrea > > Thanx, Paul >