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received-spf: None (protection.outlook.com: nokia.com does not designate permitted sender hosts) x-microsoft-antispam-message-info: B8craZCEp6XmBHyvAm7VouiA5NBIrffT3EsffLW4cwydOiq0gtKKFqzjO0yxOtb/pY9QN5FRusJMZdJ7bJvsOwvjF7pUnu4PPXKPj0rAbI8qdKYeRpaMokWVWsJxBhnl/IdSlabome6ABuVPSzblHdB8EmGCUpNhPG8ihvuEbcak9u1T0O1t0Jhq6WYI07SHyvJ5+KHX18cWl7X1DPvRu9gyq7vEgh/U9adf/bUl7fsvHpgll5CI70S03/WHuQnc2F1Dqk81VTVeKaevtoLG7gI6AbgnmrpvIQ9xXS5M7vhxntV5jj2ZYdXoFnPPe74m6MIhBZ/xxdQNJJs7E353MzU6Ixk1K4e3Ea9wFsJUYKN/0nADK2Cz+0xRmze8tbF0ZJQv3TeIwqum2rTC6YA7Og== spamdiagnosticoutput: 1:99 spamdiagnosticmetadata: NSPM Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: nokia.com X-MS-Exchange-CrossTenant-Network-Message-Id: 02957ae0-2b32-4079-9ef4-08d63da9bb4f X-MS-Exchange-CrossTenant-originalarrivaltime: 29 Oct 2018 14:20:51.9891 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 5d471751-9675-428d-917b-70f44f9630b0 X-MS-Exchange-Transport-CrossTenantHeadersStamped: HE1PR0702MB3579 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org When running into situations like: "Unhandled fault: synchronous external abort (0x210) at 0xXXX" or "Unhandled prefetch abort: synchronous external abort (0x210) at 0xXXX" it is useful to know the content of ADFSR (Auxiliary Data Fault Status Register) to indicate an ECC double-bit error in L1 or L2 cache. Refer to: Cortex-A15 Technical Reference Manual, Revision: r2p1 [6.4.8. Error Correction Code] Signed-off-by: Wladislav Wiebe --- arch/arm/mm/fault.c | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/arch/arm/mm/fault.c b/arch/arm/mm/fault.c index 3232afb6fdc0..5e240deb6ed6 100644 --- a/arch/arm/mm/fault.c +++ b/arch/arm/mm/fault.c @@ -547,6 +547,22 @@ hook_fault_code(int nr, int (*fn)(unsigned long, unsig= ned int, struct pt_regs *) fsr_info[nr].name =3D name; } =20 +/* + * Check for ECC double-bit errors in Auxiliary Data Fault Status Register + */ +static void check_adfsr_for_ecc(void) +{ + u32 adfsr =3D 0; + + asm("mrc p15, 0, %0, c5, c1, 0" : "=3Dr" (adfsr)); + + if (adfsr & (BIT(31) | BIT(23))) { + pr_alert("ADFSR status 0x%x indicates that an L1 or L2 cache\n" + "ECC double-bit error occurred at some time.\n", + adfsr); + } +} + /* * Dispatch a data abort to the relevant handler. */ @@ -559,6 +575,7 @@ do_DataAbort(unsigned long addr, unsigned int fsr, stru= ct pt_regs *regs) if (!inf->fn(addr, fsr & ~FSR_LNX_PF, regs)) return; =20 + check_adfsr_for_ecc(); pr_alert("Unhandled fault: %s (0x%03x) at 0x%08lx\n", inf->name, fsr, addr); show_pte(current->mm, addr); @@ -593,6 +610,7 @@ do_PrefetchAbort(unsigned long addr, unsigned int ifsr,= struct pt_regs *regs) if (!inf->fn(addr, ifsr | FSR_LNX_PF, regs)) return; =20 + check_adfsr_for_ecc(); pr_alert("Unhandled prefetch abort: %s (0x%03x) at 0x%08lx\n", inf->name, ifsr, addr); =20 --=20 2.16.1