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[209.132.180.67]) by mx.google.com with ESMTP id r24-v6si23359419pgv.380.2018.10.30.05.52.23; Tue, 30 Oct 2018 05:52:39 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=UQElLcHI; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727781AbeJ3Voo (ORCPT + 99 others); Tue, 30 Oct 2018 17:44:44 -0400 Received: from mail-lf1-f65.google.com ([209.85.167.65]:37022 "EHLO mail-lf1-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727712AbeJ3Voo (ORCPT ); Tue, 30 Oct 2018 17:44:44 -0400 Received: by mail-lf1-f65.google.com with SMTP id p17so2298185lfh.4 for ; Tue, 30 Oct 2018 05:51:24 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=fJAdylFjVw0nc/YXuWZ5CovdZrsIuKDi/84gZzNW5Q4=; b=UQElLcHI/Tt+DjwwuEJY23rtNvXXqkdjfSGb0GAU7lHDNtM7OXHc3EcmIsMe20MWa8 2eY4rWEJ3WTHF8jcOcVJng0Y3Agdb+c5n8xPBOnZnQ0b/btMgAEAyIhrXSjBO+fJV6BS CAXvTYOOkrk2h3kAoJLIR3SmpgXlw0pbytZ2o= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=fJAdylFjVw0nc/YXuWZ5CovdZrsIuKDi/84gZzNW5Q4=; b=k80bxl/WoLkGM3wFuQveZHIoggRG5IHpMqRTy+mtD+sZD1hO3bVlAn4R1eMI4AEREy IIOl7/i2NivcP+5G2ZHcK6ShwNTQ2wNjZuAYRzT6Tzh1nF6L0lYm0KV5vMbZGnjF/Tu6 LrLpl8mq4tSJX4M8Qw+1j/9xaUj7KBBsikt9pxk27XjM5nbv8KZANL4HLsXHqT8dbmvM YQGxfqSq8FTGDG9K7jKVSyHgq239g3tvjKSJKOXKM4gsQBSPlTB7wsChsvsWdus9ktl5 Oo9peHJPZDc92Hek5rNKIef+yPYAmQtE3hJkRr1WQh0nwJi5zlR6CAJBanoD2OfeIW/z Q9Ig== X-Gm-Message-State: AGRZ1gKPHXtAsHakakK9OoEARzL91RpHKw3h1XlXqd7jN7BzTXDBWZw2 YuwTGFLh28VP6IDNQ1Ok6cSxV//NOeV31LYoqOdAgw== X-Received: by 2002:a19:f813:: with SMTP id a19mr1754249lff.67.1540903883879; Tue, 30 Oct 2018 05:51:23 -0700 (PDT) MIME-Version: 1.0 References: <20181008191411.32555-1-manivannan.sadhasivam@linaro.org> <20181008191411.32555-6-manivannan.sadhasivam@linaro.org> <20181011164429.GA18174@Mani-XPS-13-9360> In-Reply-To: From: Linus Walleij Date: Tue, 30 Oct 2018 13:51:11 +0100 Message-ID: Subject: Re: [PATCH 5/5] pinctrl: mediatek: Add initial pinctrl driver for MT6797 SoC To: sean.wang@kernel.org Cc: Matthias Brugger , Manivannan Sadhasivam , Sean Wang , "linux-kernel@vger.kernel.org" , Amit Kucheria , "open list:GPIO SUBSYSTEM" , Rob Herring , "moderated list:ARM/Mediatek SoC support" , Cheng Mars , Linux ARM Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, Oct 18, 2018 at 5:06 PM Sean Wang wrote: > the driver currently only supports the basic operation, not including > driving operation, so > what value for the driving mode for a certain pin seems not really > matter in the early patch. I think these advanced operations can be > added with another patch. Sean can you provide an Acked-by for the pinctrl part so I can merge it once Manivannan resends it for v4.21? Yours, Linus Walleij