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From:   Leonard Crestez <leonard.crestez@nxp.com>
To:     Lucas Stach <l.stach@pengutronix.de>,
        Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
        Philipp Zabel <p.zabel@pengutronix.de>
CC:     Richard Zhu <hongxing.zhu@nxp.com>,
        "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
        Gustavo Pimentel <gustavo.pimentel@synopsys.com>,
        Jingoo Han <jingoohan1@gmail.com>,
        Bjorn Helgaas <bhelgaas@google.com>,
        Shawn Guo <shawnguo@kernel.org>,
        Fabio Estevam <fabio.estevam@nxp.com>,
        "linux-pci@vger.kernel.org" <linux-pci@vger.kernel.org>,
        "linux-arm-kernel@lists.infradead.org" 
        <linux-arm-kernel@lists.infradead.org>,
        dl-linux-imx <linux-imx@nxp.com>,
        "kernel@pengutronix.de" <kernel@pengutronix.de>
Subject: Re: [PATCH] PCI: imx: Add imx6sx suspend/resume support
Thread-Topic: [PATCH] PCI: imx: Add imx6sx suspend/resume support
Thread-Index: AQHUXy28c0CMdC4ep0yd8bBw3iPcCA==
Date:   Wed, 31 Oct 2018 11:02:04 +0000
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References: <e57884e2dbc429918db81662ddbafe22c472385c.1539019758.git.leonard.crestez@nxp.com>
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On 10/8/2018 8:38 PM, Leonard Crestez wrote:=0A=
> Enable PCI suspend/resume support on imx6sx socs. This is similar to=0A=
> imx7d with a few differences:=0A=
> =0A=
> * The PM_Turn_Off bit is exposed through an IOMUX GPR, like all other=0A=
> pcie control bits on 6sx.=0A=
> * The pcie_inbound_axi clk needs to be turned off in suspend. On resume=
=0A=
> it is restored via resume -> deassert_core_reset -> enable_ref_clk.=0A=
> =0A=
> Most of the resume logic is shared with the initial reset after probe.=0A=
> =0A=
> Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>=0A=
=0A=
This is a gentle reminder that this patch was posted ~3 weeks ago and =0A=
there is yet no reply. It's a mostly straight-forward extension of imx7d =
=0A=
pci suspend/resume support to a different SOC.=0A=
=0A=
Lucas/Philipp: can you please take a brief look?=0A=
=0A=
> ---=0A=
>   drivers/pci/controller/dwc/pci-imx6.c       | 40 ++++++++++++++++++---=
=0A=
>   include/linux/mfd/syscon/imx6q-iomuxc-gpr.h |  1 +=0A=
>   2 files changed, 36 insertions(+), 5 deletions(-)=0A=
> =0A=
> Patch is again linux-next, meant to apply here:=0A=
>   https://git.kernel.org/pub/scm/linux/kernel/git/lpieralisi/pci.git/log/=
?h=3Dpci/dwc=0A=
> =0A=
> This is quite an old patch, mostly did it to prove that imx7d suspend=0A=
> support is indeed generic.=0A=
> =0A=
> diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controll=
er/dwc/pci-imx6.c=0A=
> index 2cbef2d7c207..6171171db1fc 100644=0A=
> --- a/drivers/pci/controller/dwc/pci-imx6.c=0A=
> +++ b/drivers/pci/controller/dwc/pci-imx6.c=0A=
> @@ -771,12 +771,29 @@ static void imx6_pcie_ltssm_disable(struct device *=
dev)=0A=
>   	}=0A=
>   }=0A=
>   =0A=
>   static void imx6_pcie_pm_turnoff(struct imx6_pcie *imx6_pcie)=0A=
>   {=0A=
> -	reset_control_assert(imx6_pcie->turnoff_reset);=0A=
> -	reset_control_deassert(imx6_pcie->turnoff_reset);=0A=
> +	struct device *dev =3D imx6_pcie->pci->dev;=0A=
> +=0A=
> +	/*=0A=
> +	 * Some variants have a turnoff reset in DT while=0A=
> +	 * others poke at iomuxc registers.=0A=
> +	 */=0A=
> +	if (imx6_pcie->turnoff_reset) {=0A=
> +		reset_control_assert(imx6_pcie->turnoff_reset);=0A=
> +		reset_control_deassert(imx6_pcie->turnoff_reset);=0A=
> +	} else if (imx6_pcie->variant =3D=3D IMX6SX) {=0A=
> +		regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12,=0A=
> +				IMX6SX_GPR12_PCIE_PM_TURN_OFF,=0A=
> +				IMX6SX_GPR12_PCIE_PM_TURN_OFF);=0A=
> +		regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12,=0A=
> +				IMX6SX_GPR12_PCIE_PM_TURN_OFF, 0);=0A=
> +	} else {=0A=
> +		dev_err(dev, "PME_Turn_Off not implemented\n");=0A=
> +		return;=0A=
> +	}=0A=
>   =0A=
>   	/*=0A=
>   	 * Components with an upstream port must respond to=0A=
>   	 * PME_Turn_Off with PME_TO_Ack but we can't check.=0A=
>   	 *=0A=
> @@ -790,22 +807,35 @@ static void imx6_pcie_clk_disable(struct imx6_pcie =
*imx6_pcie)=0A=
>   {=0A=
>   	clk_disable_unprepare(imx6_pcie->pcie);=0A=
>   	clk_disable_unprepare(imx6_pcie->pcie_phy);=0A=
>   	clk_disable_unprepare(imx6_pcie->pcie_bus);=0A=
>   =0A=
> -	if (imx6_pcie->variant =3D=3D IMX7D) {=0A=
> +	switch (imx6_pcie->variant) {=0A=
> +	case IMX6SX:=0A=
> +		clk_disable_unprepare(imx6_pcie->pcie_inbound_axi);=0A=
> +		break;=0A=
> +	case IMX7D:=0A=
>   		regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12,=0A=
>   				   IMX7D_GPR12_PCIE_PHY_REFCLK_SEL,=0A=
>   				   IMX7D_GPR12_PCIE_PHY_REFCLK_SEL);=0A=
> +		break;=0A=
> +	default:=0A=
> +		break;=0A=
>   	}=0A=
>   }=0A=
>   =0A=
> +static inline bool imx6_pcie_supports_suspend(struct imx6_pcie *imx6_pci=
e)=0A=
> +{=0A=
> +	return (imx6_pcie->variant =3D=3D IMX7D ||=0A=
> +		imx6_pcie->variant =3D=3D IMX6SX);=0A=
> +}=0A=
> +=0A=
>   static int imx6_pcie_suspend_noirq(struct device *dev)=0A=
>   {=0A=
>   	struct imx6_pcie *imx6_pcie =3D dev_get_drvdata(dev);=0A=
>   =0A=
> -	if (imx6_pcie->variant !=3D IMX7D)=0A=
> +	if (!imx6_pcie_supports_suspend(imx6_pcie))=0A=
>   		return 0;=0A=
>   =0A=
>   	imx6_pcie_pm_turnoff(imx6_pcie);=0A=
>   	imx6_pcie_clk_disable(imx6_pcie);=0A=
>   	imx6_pcie_ltssm_disable(dev);=0A=
> @@ -817,11 +847,11 @@ static int imx6_pcie_resume_noirq(struct device *de=
v)=0A=
>   {=0A=
>   	int ret;=0A=
>   	struct imx6_pcie *imx6_pcie =3D dev_get_drvdata(dev);=0A=
>   	struct pcie_port *pp =3D &imx6_pcie->pci->pp;=0A=
>   =0A=
> -	if (imx6_pcie->variant !=3D IMX7D)=0A=
> +	if (!imx6_pcie_supports_suspend(imx6_pcie))=0A=
>   		return 0;=0A=
>   =0A=
>   	imx6_pcie_assert_core_reset(imx6_pcie);=0A=
>   	imx6_pcie_init_phy(imx6_pcie);=0A=
>   	imx6_pcie_deassert_core_reset(imx6_pcie);=0A=
> diff --git a/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h b/include/linux/=
mfd/syscon/imx6q-iomuxc-gpr.h=0A=
> index 6c1ad160ed87..c1b25f5e386d 100644=0A=
> --- a/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h=0A=
> +++ b/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h=0A=
> @@ -438,10 +438,11 @@=0A=
>   #define IMX6SX_GPR5_DISP_MUX_DCIC1_LCDIF1		(0x0 << 1)=0A=
>   #define IMX6SX_GPR5_DISP_MUX_DCIC1_LVDS			(0x1 << 1)=0A=
>   #define IMX6SX_GPR5_DISP_MUX_DCIC1_MASK			(0x1 << 1)=0A=
>   =0A=
>   #define IMX6SX_GPR12_PCIE_TEST_POWERDOWN		BIT(30)=0A=
> +#define IMX6SX_GPR12_PCIE_PM_TURN_OFF			BIT(16)=0A=
>   #define IMX6SX_GPR12_PCIE_RX_EQ_MASK			(0x7 << 0)=0A=
>   #define IMX6SX_GPR12_PCIE_RX_EQ_2			(0x2 << 0)=0A=
>   =0A=
>   /* For imx6ul iomux gpr register field define */=0A=
>   #define IMX6UL_GPR1_ENET1_CLK_DIR		(0x1 << 17)=0A=
> =0A=
=0A=