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[209.132.180.67]) by mx.google.com with ESMTP id x10-v6si28483780plo.100.2018.11.01.02.02.51; Thu, 01 Nov 2018 02:03:05 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727759AbeKASDB (ORCPT + 99 others); Thu, 1 Nov 2018 14:03:01 -0400 Received: from usa-sjc-mx-foss1.foss.arm.com ([217.140.101.70]:53328 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726520AbeKASDB (ORCPT ); Thu, 1 Nov 2018 14:03:01 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id E4895341; Thu, 1 Nov 2018 02:00:55 -0700 (PDT) Received: from big-swifty.misterjones.org (unknown [10.37.9.149]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id BDAE33F557; Thu, 1 Nov 2018 02:00:52 -0700 (PDT) Date: Thu, 01 Nov 2018 09:00:49 +0000 Message-ID: <86bm792mv2.wl-marc.zyngier@arm.com> From: Marc Zyngier To: Peter Ujfalusi Cc: Lokesh Vutla , Nishanth Menon , Device Tree Mailing List , Grygorii Strashko , , Sekhar Nori , , Tero Kristo , Rob Herring , Santosh Shilimkar , , Linux ARM Mailing List Subject: Re: [PATCH v2 09/10] irqchip: ti-sci-inta: Add support for Interrupt Aggregator driver In-Reply-To: <49029695-79a0-141b-a9da-9764cb0ed60f@ti.com> References: <20181018154017.7112-1-lokeshvutla@ti.com> <20181018154017.7112-10-lokeshvutla@ti.com> <9969f24c-cdb0-1f5c-d0f4-b1c1f587325c@ti.com> <86va5ssrfm.wl-marc.zyngier@arm.com> <63ba5353-8470-b4c1-64a8-a1df5bf48614@ti.com> <86va5myz7t.wl-marc.zyngier@arm.com> <81136b74-4b45-f44b-0168-23d191a4fb5e@ti.com> <49029695-79a0-141b-a9da-9764cb0ed60f@ti.com> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL/10.8 EasyPG/1.0.0 Emacs/25.1 (aarch64-unknown-linux-gnu) MULE/6.0 (HANACHIRUSATO) Organization: ARM Ltd MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, 01 Nov 2018 07:55:12 +0000, Peter Ujfalusi wrote: > > Lokesh, > > On 10/29/18 3:04 PM, Lokesh Vutla wrote: > >>> With the above information, linux should send a message to > >>> system-controller using TISCI protocol. After policing the given > >>> information, system-controller does the following: > >>> - Attaches the interrupt(INTA input) to the device resource index > >>> - Muxes the interrupt(INTA input) to corresponding vint(INTA output) > >>> - Muxes the vint(INTR input) to GIC irq(INTR output). > >> > >> Isn't there a 1:1 mapping between *used* INTR inputs and outputs? > >> Since INTR is a router, there is no real muxing. I assume that the > >> third point above is just a copy-paste error. > > > > Right, my bad. INTR is just a router and no read muxing. > > INTR can mux M interrupt inputs to N interrupt outputs. > One selects which interrupt input is outputted on the given interrupt > output. > It is perfectly valid (but not sane) to select the same interrupt input > to be routed to _all_ interrupt output for example. > > Not sure if we are going to use this for anything but 1:1 mapping, but > might worth keeping in mind... It's not obvious how you'd use this "feature". Interrupt replicator, should one of the output be tied to another part of the system? Or maybe that's just the result of reusing some generic block... M. -- Jazz is not dead, it just smell funny.