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[209.132.180.67]) by mx.google.com with ESMTP id n1-v6si17113053pfd.166.2018.11.02.12.19.02; Fri, 02 Nov 2018 12:19:16 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=redhat.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726927AbeKCE1B (ORCPT + 99 others); Sat, 3 Nov 2018 00:27:01 -0400 Received: from mx1.redhat.com ([209.132.183.28]:41764 "EHLO mx1.redhat.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725917AbeKCE1B (ORCPT ); Sat, 3 Nov 2018 00:27:01 -0400 Received: from smtp.corp.redhat.com (int-mx07.intmail.prod.int.phx2.redhat.com [10.5.11.22]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 65B0A3001E72; Fri, 2 Nov 2018 19:18:38 +0000 (UTC) Received: from oldenburg.str.redhat.com (ovpn-116-27.ams2.redhat.com [10.36.116.27]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 5629D1062249; Fri, 2 Nov 2018 19:18:16 +0000 (UTC) From: Florian Weimer To: Mathieu Desnoyers Cc: Richard Henderson , Will Deacon , linux-kernel , libc-alpha , Carlos O'Donell , Joseph Myers , Szabolcs Nagy , Thomas Gleixner , Ben Maurer , Peter Zijlstra , "Paul E. McKenney" , Boqun Feng , Dave Watson , Paul Turner , linux-api Subject: Re: Supporting core-specific instruction sets (e.g. big.LITTLE) with restartable sequences References: <313542172.8.1541171544337.JavaMail.zimbra@efficios.com> Date: Fri, 02 Nov 2018 20:18:12 +0100 In-Reply-To: <313542172.8.1541171544337.JavaMail.zimbra@efficios.com> (Mathieu Desnoyers's message of "Fri, 2 Nov 2018 11:12:24 -0400 (EDT)") Message-ID: <877ehvb85n.fsf@oldenburg.str.redhat.com> User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/25.3 (gnu/linux) MIME-Version: 1.0 Content-Type: text/plain X-Scanned-By: MIMEDefang 2.84 on 10.5.11.22 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.47]); Fri, 02 Nov 2018 19:18:38 +0000 (UTC) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org * Mathieu Desnoyers: > Basically, the use-cases targeted are those where some cores on the > system support a larger instruction set than others. So for instance, > some cores could use a faster atomic add instruction than others, > which should rely on a slower fallback. This is also the same story > for reading the performance monitoring unit counters from user-space: > it depends on the feature-set supported by the CPU on which the > instruction is issued. Same applies to cores having different > cache-line sizes. The kernel needs to present a consistent view to userspace, the common denominator. I don't think there is any other way. The situation is not new at all, by the way. It also arises with VM and process migration. In glibc, we do not re-run CPU feature selection upon resume (and how could we? function pointers would have to change), and we have no plans to implement anything differently. Thanks, Florian