Received: by 2002:ac0:98c7:0:0:0:0:0 with SMTP id g7-v6csp1840910imd; Sun, 4 Nov 2018 10:34:22 -0800 (PST) X-Google-Smtp-Source: AJdET5dpI+RLj2Cgl+xXsLDAXTN0zs9QS28r+FACU8/JYID7miEaJjpYjYFSCjL4QF0TTg49/2KJ X-Received: by 2002:a17:902:2bc3:: with SMTP id l61-v6mr14327655plb.5.1541356462113; Sun, 04 Nov 2018 10:34:22 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1541356462; cv=none; d=google.com; s=arc-20160816; b=N4fxYUT4zTnhXO5/PRxxmNc6r866l6/5Zq+yYFdn+MfmQW6g73RgGKd55Rm4DTCo2v +PIvnJEneinfhUKud/cQxe1HfPIUvWmvHfxsduJaH8SWJ/A9s37ViEQNftlXwolaRt+r hhVq2D3GURtAYgX442p65bc7oKgCkCmb2GLeK+MAzVpZqCAHkmAS1PiGFdcAZ5vBXGQJ tl9jPTA8JVCokcf4DgbWNkucC0xh60d+yY14mpXbkRFkMMYDsmx+1/wsok1pdf448MUj fSI84N+LtezzDC6xVQqdUMTvZP1NPa2m+3F/R7nJJ8riXcLOIti7HeN0oKcTViWow3hr QeqQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:subject:cc:to:from:date; bh=I+EPQ9GufBmR50gccStI77agwFVRbeGXAdFqputiT2U=; b=TplMN6LGERzT+693iJaZBLYq295/vlkztySL5pjQglhOwptbTvk2Sh62LNmFrFowCl HQ58Y9XilEAJdqu6gJumqZcmmxc63h9O307Vwax8LfIiRToBrq0JDBKnj29FpJOvDzEH TgwzE4HxOA7vhnL9b7DI/973eg79mfsW3Fhi846d1e6CWi46D77KozHPxSNUdu61SBlN M9ut0N3RpbZMk1BICpJLnFrdzj0zh+691x2yebP3CfRRjXHwNGum8YJszSoTfNWh87w5 1+9I9T5CRVTKwNQ5+v4uva+rmwsDUZD40A6Y+TOSKPWpshqOVUbLb2kkX0shFmVcZLCD ABaQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id j19-v6si40325216pfh.63.2018.11.04.10.34.07; Sun, 04 Nov 2018 10:34:22 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731396AbeKEBL4 convert rfc822-to-8bit (ORCPT + 99 others); Sun, 4 Nov 2018 20:11:56 -0500 Received: from mail.bootlin.com ([62.4.15.54]:44884 "EHLO mail.bootlin.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730014AbeKEBL4 (ORCPT ); Sun, 4 Nov 2018 20:11:56 -0500 Received: by mail.bootlin.com (Postfix, from userid 110) id 26F57207CD; Sun, 4 Nov 2018 16:56:28 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on mail.bootlin.com X-Spam-Level: X-Spam-Status: No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT shortcircuit=ham autolearn=disabled version=3.4.0 Received: from bbrezillon (unknown [91.160.177.164]) by mail.bootlin.com (Postfix) with ESMTPSA id C816A20379; Sun, 4 Nov 2018 16:56:27 +0100 (CET) Date: Sun, 4 Nov 2018 16:56:27 +0100 From: Boris Brezillon To: Abhishek Sahu Cc: linux-arm-msm@vger.kernel.org, Miquel Raynal , linux-kernel@vger.kernel.org, Marek Vasut , linux-mtd@lists.infradead.org, Richard Weinberger , Andy Gross , Brian Norris , David Woodhouse Subject: Re: [PATCH 2/5] mtd: rawnand: qcom: remove driver specific block_markbad function Message-ID: <20181104165627.293773a8@bbrezillon> In-Reply-To: <20180720150348.592c8984@bbrezillon> References: <1530863519-5564-1-git-send-email-absahu@codeaurora.org> <1530863519-5564-3-git-send-email-absahu@codeaurora.org> <20180718232350.3eaade9a@xps13> <20180718234358.6bb5e8a0@bbrezillon> <7ab0be154272b71f9beb2a7fb830c7be@codeaurora.org> <20180720150348.592c8984@bbrezillon> X-Mailer: Claws Mail 3.16.0 (GTK+ 2.24.32; x86_64-pc-linux-gnu) MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8BIT Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Abhishek, On Fri, 20 Jul 2018 15:03:48 +0200 Boris Brezillon wrote: > On Fri, 20 Jul 2018 17:46:38 +0530 > Abhishek Sahu wrote: > > > Hi Boris, > > > > On 2018-07-19 03:13, Boris Brezillon wrote: > > > On Wed, 18 Jul 2018 23:23:50 +0200 > > > Miquel Raynal wrote: > > > > > >> Boris, > > >> > > >> Can you please check the change in qcom_nandc_write_oob() is > > >> valid? I think it is but as this is a bit of a hack I prefer double > > >> checking. > > > > > > Indeed, it's hack-ish. > > > > > >> > > >> Thanks, > > >> Miquèl > > >> > > >> > > >> Abhishek Sahu wrote on Fri, 6 Jul 2018 > > >> 13:21:56 +0530: > > >> > > >> > The NAND base layer calls write_oob() by setting bytes at > > >> > chip->badblockpos with value non 0xFF for updating bad block status. > > >> > The QCOM NAND controller skips the bad block bytes while doing normal > > >> > write with ECC enabled. When initial support for this driver was > > >> > added, the driver specific function was added temporarily for > > >> > block_markbad() with assumption to change for raw read in NAND base > > >> > layer. Moving to raw read for block_markbad() seems to take more time > > >> > so this patch removes driver specific block_markbad() function by > > >> > using following HACK in write_oob() function. > > >> > > > >> > Check for BBM bytes in OOB and accordingly do raw write for updating > > >> > BBM bytes in NAND flash or normal write for updating available OOB > > >> > bytes. > > > > > > Why don't we change that instead of patching the qcom driver to guess > > > when the core tries to mark a block bad? If you're afraid of breaking > > > existing drivers that might rely on the "write/read BBM in non-raw > > > mode" solution (I'm sure some drivers are), you can always add a new > > > flag in chip->options (NAND_ACCESS_BBM_IN_RAW_MODE) and only use raw > > > accessors when this flag is set. > > > > > > > We started with that Only > > > > http://patchwork.ozlabs.org/patch/508565/ > > > > and since we didn't conclude, we went for driver > > specific bad block check and mark bad block functions. > > > > Now, we wanted to get rid of driver specific functions > > > > 1. For bad block check, we found the way to get the BBM bytes > > with ECC read. Controller updates BBM in separate register > > which we can read and update the same in OOB. Patch #1 of > > series does the same. > > > > 2. For bad block mark, there is no way to update in ECC mode > > that's why we went for HACK to get rid of driver specific > > function. > > > > If adding flag is fine now then this HACK won't be required. > > Yep. I'm fine with that. Can you rebase the patch you pointed out on top > of nand/next and move the flag to chip->options instead of > chip->bbt_options + prefix it with NAND_ instead of NAND_BBT_? I'm currently trying to get rid of chip->block_bad() (now placed in chip->legacy.block_bad()), and I wanted to know if you were still planning to submit the changes we discussed in this thread. If you don't have time, please let me know and I'll try to do it. Thanks, Boris