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Date:   Mon, 5 Nov 2018 01:08:52 -0800
From:   Christoph Hellwig <hch@infradead.org>
To:     Arnd Bergmann <arnd@arndb.de>
Cc:     Christoph Hellwig <hch@infradead.org>,
        Vincent Chen <vincentc@andestech.com>, aou@eecs.berkeley.edu,
        alankao@andestech.com, greentime@andestech.com, palmer@sifive.com,
        linux-kernel@vger.kernel.org, zong@andestech.com,
        kito@andestech.com, linux-riscv@lists.infradead.org,
        deanbo422@gmail.com
Subject: Re: [RFC 0/2] RISC-V: A proposal to add vendor-specific code
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On Mon, Nov 05, 2018 at 09:52:52AM +0100, Arnd Bergmann wrote:
> > I fundamentally disagree with this… and think it should be the contrary.
> >
> > 1. The kernel shall support no vendor specific instructions whatsoever,
> > period.
> 
> I think what was meant above is
> 
> 1. If a vendor extension requires kernel support, that support
> must be able to be built into a kernel image without breaking support
> for CPUs that do not have that extension, to allow building a single
> kernel image that works on all CPUs.

No.  This literally means no vendor extensions involving instructions
or CSRs in the kernel.  They are fine for userspace, or for the M-mode
code including impementation of the SBI, but not for the kernel.