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Date:   Mon, 5 Nov 2018 10:19:22 +0100
From:   Ludovic Desroches <ludovic.desroches@microchip.com>
To:     Jean-Michel Hautbois <jhautbois@gmail.com>
CC:     <boris.brezillon@bootlin.com>,
        Nicolas Ferre <nicolas.ferre@atmel.com>,
        linux-kernel <linux-kernel@vger.kernel.org>,
        <linux-arm-kernel@lists.infradead.org>
Subject: Re: sama5d: using the ebi interface from another driver
Message-ID: <20181105091922.gws52ledkqwc46xx@M43218.corp.atmel.com>
Mail-Followup-To: Jean-Michel Hautbois <jhautbois@gmail.com>,
        boris.brezillon@bootlin.com,
        Nicolas Ferre <nicolas.ferre@atmel.com>,
        linux-kernel <linux-kernel@vger.kernel.org>,
        linux-arm-kernel@lists.infradead.org
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Hi Jean-Michel,

On Fri, Nov 02, 2018 at 02:35:26PM +0100, Jean-Michel Hautbois wrote:
> Hi all,
> 
> I have a custom board based on a sama5d3 chip. The SoC is connected to
> 2 pef24628 SHDSL transceivers, the first one on ebi@40000000 and the
> second one on ebi@50000000.
> I tried to write a basic char driver, using request_mem_region and
> ioremap but I can't read or write into the device.
> I have to say that the driver is based on a proprietary one, and
> tested years ago on a PowerPC board.
> 
> Then, after looking into deeper details in the datasheet I understand
> it is connected through EBI and it sounds not so easy :D.
> 
> I would appreciate some help/pointers on this, as there is (at least,
> I could find) few documentation on how to use it except for NAND
> cases.
> 
> I have something like that in my DTS, but not sure this is the correct
> way to do it :
> 
>         ebi: ebi@10000000 {
>             pinctrl-0 = <&pinctrl_ebi_nand_addr>;
>             pinctrl-names = "default";
>             status = "okay";
> 
>             dsp0: pef24628@1 {
>                 status = "okay";
>                 compatible = "intel,pef24628";
>                 #address-cells = <1>;
>                 #size-cells = <1>;
>                 reg = <0x1 0x0 0x8000>;
>                 pinctrl-0 = <&pinctrl_dsp_cs1>;
>             };
> 
>             dsp1: pef24628@2 {
>                 status = "okay";
>                 compatible = "intel,pef24628";
>                 #address-cells = <1>;
>                 #size-cells = <1>;
>                 reg = <0x2 0x0 0x8000>;
>                 pinctrl-0 = <&pinctrl_dsp_cs2>;
>             };
> 
>             nand_controller: nand-controller {
>                 status = "okay";
> 
>                 nand@3 {
>                     reg = <0x3 0x0 0x2>;
>                     atmel,rb = <0>;
>                     nand-bus-width = <8>;
>                     nand-ecc-mode = "hw";
>                     nand-ecc-strength = <4>;
>                     nand-ecc-step-size = <512>;
>                     nand-on-flash-bbt;
>                     label = "atmel_nand";
> 
>                     partitions {
>                         compatible = "fixed-partitions";
>                         #address-cells = <1>;
>                         #size-cells = <1>;
> [...]
>                     };
>                 };
>             };
> 
> The pinctrl for ebi should probably be changed however, I am wondering
> how the (platform ?) driver can access the adress ? Should it parse
> itself the parent, and find range, etc. Or is there an accessor for it
> ?

At first look, your DT seems correct. You have nothing special to do,
the usual platform_get_resource() and devm_ioremap_resource() calls are enough.
The address translation should be done automatically according to ranges
property.

Another hint is to check and specify the signals timings.

Regards

Ludovic

> 
> Maybe can I just manually toggle the CS GPIO, and don't try to make
> anything more complex than what it should be ? The driver should not
> be atmel dependant...
> 
> Thanks !
> JM
> 
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