Received: by 2002:ad5:474a:0:0:0:0:0 with SMTP id i10csp1888734imu; Tue, 6 Nov 2018 06:01:27 -0800 (PST) X-Google-Smtp-Source: AJdET5dskDwxDO1SZNm5n49U5wGccWjmkUEvMaiymHBBR9GxvlQWcO6Ju0xHHas9TyEGxotgbSML X-Received: by 2002:a17:902:d708:: with SMTP id w8-v6mr18565040ply.72.1541512887928; Tue, 06 Nov 2018 06:01:27 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1541512887; cv=none; d=google.com; s=arc-20160816; b=NWGWMS+MjrTT8TDKsbQCdMa9BTosD+lbr8FjkTK0jrcyLpidLIyCsMF2WvH7ZpvFyz wus6VX6q3bweItaxEwforIPoJbEof44f1uWScM91l3fAheGkgv9Uc47ruy0kg31QfKVr hhXMIztp7cVVyN37WECLkAfZc1LlMuVB4tl8wJ9MOXa8WdkvEQYhcQ4gWn6fhgEmbWb/ NNcohmBE1XZ2Uz5/VwWm+rKUYzB7nq6owWqMka+7xsYpnb9a/EpBNTjanc+Ysl4KS+DU g+B7ADrv7MwMAME5puzExkOeRcnr9VluEI/IoS24wzE1tbvdiDQlTBUQq5rV8X1FgMg0 4k1g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:cc:to:subject:message-id:date:from :in-reply-to:references:mime-version:dkim-signature; bh=2Wj7IXn/A5LLYERFQY9zRIKBiWloSmO1Zg7RiX2waps=; b=OF+xJGbVsJ4AKVi7rJvQYITlYTjqQRoEQboLcM0HpZHCee8ooywuNRtt9McdnMkYdC IMG202EF4NAnChSz19h3Tl1JCukmCQp6Rc/DHZ91EP7MOBzBabx5sCdoQS5CAnop0dxE TJchfPFONLB4PrcHDYqhLDWRybUvk2g0eNtGnuu82mdI0M4oJIdUJ8O082I1zIyCM4/5 WA/myDQRP0PMpD01Z7Xx9npZiLgnrIxH9RvGJSklPkl0phEpoQH8E+pqQwGBqRTrGPGT A6+O2OUysO5yL5eTXHBacvdGlBNZo2Bex3JU53zjytCQ6+H6JkuTWr0RCVMMw+Y+hxh2 miww== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ffwll.ch header.s=google header.b=fnQwowEV; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id y24-v6si13784729pfm.141.2018.11.06.06.01.09; Tue, 06 Nov 2018 06:01:27 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ffwll.ch header.s=google header.b=fnQwowEV; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388613AbeKFXZY (ORCPT + 99 others); Tue, 6 Nov 2018 18:25:24 -0500 Received: from mail-io1-f65.google.com ([209.85.166.65]:41931 "EHLO mail-io1-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2388048AbeKFXZY (ORCPT ); Tue, 6 Nov 2018 18:25:24 -0500 Received: by mail-io1-f65.google.com with SMTP id a5-v6so9264009ioq.8 for ; Tue, 06 Nov 2018 06:00:01 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ffwll.ch; s=google; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=2Wj7IXn/A5LLYERFQY9zRIKBiWloSmO1Zg7RiX2waps=; b=fnQwowEVZXpOci1SVgWdABTPVnuacNE1bKRmBg6Jes5Oc/hMKiuLNCbl5AV/TowJfP ucGWB63wN1DUQM0elPFAd5ifQW3438e+zj3ur3UtXqPzqZ0npCqz4Ykb1kzWd3fomlE2 Ei6WyA3dnuX1G/plQ2L9JhLVnBTMmwDxwVoi8= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=2Wj7IXn/A5LLYERFQY9zRIKBiWloSmO1Zg7RiX2waps=; b=IBzmOI2GX5EivxdD5ulKkKkjoxpqkHQ/4SBoI3y2eTFfvvK2WDT8gcc687kfDWazKb 88Sa4wr87KJ+lkur2gt2urlXB0/tDxSyjae7U8zsCn5+vZA6rxYomod0f64Uw58V4AOJ Yg9/a1RKturu0uTUEfEpfLCRxm0DH85RUryUNDPTYpwRjb3TajbDqTVNns/M4uUAugOz YGtZJMPxvqjaNU0e6BTEnwIrezWDMc8q+F0W/GsqBO+aQgV7MoTAy55JB9XJWvVRZhP3 eGcEICQ9iB+j3ctH7sd8alNE0xDizGZyAXoo/VVqXqdO2vjmHKlNA+rM9UFz26LwkPr/ Kbkw== X-Gm-Message-State: AGRZ1gI9iraQU45LcJdTyMdIahLTmdMBrEnNqbeakAIX5tAyCQbz7e+z 19hdgo58w23HSlfG+yoGAQzjJkEhqGfq20zxCRWUeA== X-Received: by 2002:a5e:d510:: with SMTP id e16-v6mr8058008iom.291.1541512801088; Tue, 06 Nov 2018 06:00:01 -0800 (PST) MIME-Version: 1.0 References: <1541497202-20570-1-git-send-email-narmstrong@baylibre.com> <20181106111310.GP21967@phenom.ffwll.local> In-Reply-To: From: Daniel Vetter Date: Tue, 6 Nov 2018 14:59:49 +0100 Message-ID: Subject: Re: [PATCH 0/3] drm/meson: Add support for Overlay and OSD Plane scaling To: Neil Armstrong Cc: dri-devel , linux-amlogic@lists.infradead.org, Linux Kernel Mailing List , Linux ARM Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, Nov 6, 2018 at 2:37 PM Neil Armstrong wrote: > > Hi Daniel, > > On 06/11/2018 12:13, Daniel Vetter wrote: > > On Tue, Nov 06, 2018 at 10:39:59AM +0100, Neil Armstrong wrote: > >> This serie adds support for : > >> - Overlay Plane blended with the primary plane, we can describe as "behind" > >> - Primary Plane up-scaling up to 5x factor to support the OSD plane being > >> upscaled from 1920x1080 when the display mode is set as 3840x2160. > >> > >> These patches depends on the "drm/meson: Allow using optional canvas provider" > >> patchset from Maxime Jourdan at [1] > >> > >> [1] https://patchwork.kernel.org/project/linux-amlogic/list/?series=38355 > >> > >> Neil Armstrong (3): > >> drm/meson: Support Overlay plane for video rendering > >> drm/meson: move OSD scaler management into plane atomic update > >> drm/meson: Add primary plane scaling > > > > Got bored, read a bit your patch series. Two things I've noticed: > > Great you got bored today ! > > > - We need to drop the crtc_state argument from > > drm_atomic_helper_check_plane_state(), some drivers (not meson) do > > really funny stuff with this. > > Should drm_atomic_get_crtc_state() be integrated into drm_atomic_helper_check_plane_state() ? Yeah. But I think I'll bake that into a nice todo.rst task for the next intern. It's kinda the perfect task, including some cleanup in armada and a bit of wtf in hdlcd. > > - I think your osd1_commit = true update is racy with the interrupt > > handler checking it. Needs at least a few memory barriers. Since helpers > > guarantee that you can't overtake a preceending update (you do the > > vblank handling after the updating) that should be ok, except you arm > > the vblank before setting up registers, so this might race too. > > Yeah, I need to do a cleanup of this at some point... Usually we solved this by wrapping everything (i.e. from atomic_begin to atomic_flush) under a commit spinlock. Same with the entire interrupt handler. You can do more complicated ofc, but this tends to get the job done and very obviously avoids all the races. Also as long as you don't have any register writes in there it should be fast enough. If not, prepare all the register data as a separate allocation and then just exchange the pointers. -Daniel > > > > > Anyway all unrelated, so feel free to smash an > > > > Acked-by: Daniel Vetter > > > > on the entire series. > > thanks ! > > Will push to drm-misc-next once the branch is ready. > > Neil > > > > > Cheers, Daniel > > > >> > >> drivers/gpu/drm/meson/Makefile | 2 +- > >> drivers/gpu/drm/meson/meson_canvas.c | 7 +- > >> drivers/gpu/drm/meson/meson_canvas.h | 11 +- > >> drivers/gpu/drm/meson/meson_crtc.c | 251 +++++++++++++- > >> drivers/gpu/drm/meson/meson_drv.c | 29 +- > >> drivers/gpu/drm/meson/meson_drv.h | 62 ++++ > >> drivers/gpu/drm/meson/meson_overlay.c | 586 ++++++++++++++++++++++++++++++++ > >> drivers/gpu/drm/meson/meson_overlay.h | 14 + > >> drivers/gpu/drm/meson/meson_plane.c | 177 ++++++++-- > >> drivers/gpu/drm/meson/meson_registers.h | 3 + > >> drivers/gpu/drm/meson/meson_viu.c | 15 + > >> drivers/gpu/drm/meson/meson_vpp.c | 90 +++-- > >> 12 files changed, 1156 insertions(+), 91 deletions(-) > >> create mode 100644 drivers/gpu/drm/meson/meson_overlay.c > >> create mode 100644 drivers/gpu/drm/meson/meson_overlay.h > >> > >> -- > >> 2.7.4 > >> > >> _______________________________________________ > >> dri-devel mailing list > >> dri-devel@lists.freedesktop.org > >> https://lists.freedesktop.org/mailman/listinfo/dri-devel > > > > _______________________________________________ > dri-devel mailing list > dri-devel@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/dri-devel -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch