Received: by 2002:ad5:474a:0:0:0:0:0 with SMTP id i10csp1004299imu; Fri, 9 Nov 2018 09:23:06 -0800 (PST) X-Google-Smtp-Source: AJdET5eZVYQVFjlcuOPCQCkYuUfJrEacUQv+hMEbT2tYv8af7+Vx+tYiJDjcZFsi89BKONuWc956 X-Received: by 2002:a17:902:6e08:: with SMTP id u8-v6mr9691238plk.64.1541784186729; Fri, 09 Nov 2018 09:23:06 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1541784186; cv=none; d=google.com; s=arc-20160816; b=eyeVCVu2S1MbnAFOdfi/I71L6r1G9ZV8sfSbVBZ369s+3UugRYbI65yYRcEuu5RQfP EFroYbbLkxuY71g90WwY7EOnnwA3q/imwjAt+1wyAfUnuSPQEbdB+MH82Qmr7x8kcV+Y tGL2n1BU9irvOtcI9qe5nQRV7loJtQ3w9ZU9PRLLFLXMF3DpiwyOqVldtIDa4gWuOGO6 S34f4qUx1V6+j3cwTjEs4RUmPNF+iT8yVI7POSFYPrVIYpLiCtXtRsj6PPSiLLP0/cPe zaLklHeIWZpivmerzkUmyebfXxYWj7YI9zqZbK7G7+Bg0qrDunf/uTeEKqcZ8cs506mJ ysJg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:in-reply-to :mime-version:user-agent:date:message-id:from:cc:references:to :subject; bh=YtR0nY3owIyu8AK111QIn2DpQU4iTRycLg+irnT0cQc=; b=S5wuWOcG0Kmsey82yNc6TITqIBU9i5xbELyq1vzU+If49Bfuk/QGdvGNXh0VSFOpup LvbFOF9QnjYOB8ckf4e6HtF+B5F4v5k7JCjyydDo1sG4KQr5soHpWmY9TZCOhAlgm/bD ur5VCRqCR3yAuM4BtzdsGnKTR9toKzu13Gh0ZezNyAQd/a0KFu85kagxORcJnnLnMhhB Ip6yq8E1Csihp7+Z4wBipwuenU5ajExSjuth9lMit2dvEo4qducWWKpCtZBfY90/ZVa1 tRhidbAVCT45YBbTILgBaMLMSGx+F6LcRaAyP+RHrsIq0Pf2c5Ed4baCdvK/wcbBkTsp ty+Q== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id k4-v6si7336264pgg.527.2018.11.09.09.22.32; Fri, 09 Nov 2018 09:23:06 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728315AbeKJDBv (ORCPT + 99 others); Fri, 9 Nov 2018 22:01:51 -0500 Received: from szxga07-in.huawei.com ([45.249.212.35]:32834 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1728115AbeKJDBv (ORCPT ); Fri, 9 Nov 2018 22:01:51 -0500 Received: from DGGEMS403-HUB.china.huawei.com (unknown [172.30.72.59]) by Forcepoint Email with ESMTP id 09F3467893910; Sat, 10 Nov 2018 01:20:13 +0800 (CST) Received: from [127.0.0.1] (10.210.169.145) by DGGEMS403-HUB.china.huawei.com (10.3.19.203) with Microsoft SMTP Server id 14.3.408.0; Sat, 10 Nov 2018 01:20:03 +0800 Subject: Re: [PATCH 00/10] irqdomain, gic-v3-its: Implement late irq domain initialization To: Robert Richter , Marc Zyngier , Thomas Gleixner , Jason Cooper References: <20181107220254.6116-1-rrichter@cavium.com> CC: Lorenzo Pieralisi , Stuart Yoder , Will Deacon , "linux-kernel@vger.kernel.org" , "Richter, Robert" , Matthias Brugger , "linux-arm-kernel@lists.infradead.org" , Laurentiu Tudor , Linuxarm From: John Garry Message-ID: Date: Fri, 9 Nov 2018 17:19:54 +0000 User-Agent: Mozilla/5.0 (Windows NT 10.0; WOW64; rv:45.0) Gecko/20100101 Thunderbird/45.3.0 MIME-Version: 1.0 In-Reply-To: <20181107220254.6116-1-rrichter@cavium.com> Content-Type: text/plain; charset="windows-1252"; format=flowed Content-Transfer-Encoding: 7bit X-Originating-IP: [10.210.169.145] X-CFilter-Loop: Reflected Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 07/11/2018 22:03, Robert Richter wrote: > This patch series is a rework of the gic-v3-its initialization. It is > in preparation of a further series that uses CMA memory allocation for > ITS tables. For this the CMA framework must be available and thus ITS > needs to be initialized after the arch_initcalls. This requires two > major reworks. > > First we must remove all irq domain init order dependencies (patches > #1-#5), second the ITS initialization must be split into an early > probe and a later init part (patches #6-#10). > > Patch #1 introduces a new interface to request an irq domain, see the > patch description for details. In patches #2-#5 all ITS related irq > domains are converted to use the new interface. There are no order > dependencies for parent and client irq domain initialization anymore > which allows us to initialize all ITS irq domains in the same initcall > (moving to the later subsys_initcall). Note that I do not have fsl > hardware available, the code should work, but is only carefully > reviewed and compile tested, please test on that hardware. > > The remaining patches #6-#10 are an incremental rework of the ITS > initialization, basically splitting probe and init (patch #7) and > separating it from gic-v3 code (patch #8). Patches #9 and #10 change > initcall levels for various drivers. > > Patches have been tested with Cavium ThunderX and ThunderX2. I have an > implementation of CMA ITS table allocation on top of this series > available, I will send out patches for this in a couple of days. Hi, For this follow-on patchset, will it conflict with this: https://lkml.org/lkml/2017/6/25/75 We were planning on reposting with some results. Thanks, John > > Robert Richter (10): > irqdomain: Add interface to request an irq domain > irqchip/gic-v3-its-platform-msi: Remove domain init order dependencies > irqchip/irq-gic-v3-its-pci-msi: Remove domain init order dependencies > irqchip/irq-gic-v3-its-fsl-mc-msi: Remove domain init order > dependencies > fsl-mc/dprc-driver: Remove domain init order dependencies > irqchip/gic-v3-its: Initialize its nodes in probe order > irqchip/gic-v3-its: Split probing from its node initialization > irqchip/gic-v3-its: Decouple its initialization from gic > irqchip/gic-v3-its: Initialize its nodes later > irqchip/gic-v3-its: Initialize MSIs with subsys_initcalls > > drivers/bus/fsl-mc/dprc-driver.c | 41 +++++++ > drivers/bus/fsl-mc/fsl-mc-msi.c | 6 +- > drivers/irqchip/irq-gic-v3-its-fsl-mc-msi.c | 49 +++++--- > drivers/irqchip/irq-gic-v3-its-pci-msi.c | 68 ++++++----- > drivers/irqchip/irq-gic-v3-its-platform-msi.c | 56 ++++++--- > drivers/irqchip/irq-gic-v3-its.c | 160 +++++++++++++++++--------- > drivers/irqchip/irq-gic-v3.c | 12 +- > include/linux/cpuhotplug.h | 1 + > include/linux/irqchip/arm-gic-v3.h | 5 +- > include/linux/irqdomain.h | 15 +++ > kernel/irq/irqdomain.c | 158 +++++++++++++++++++++++++ > 11 files changed, 441 insertions(+), 130 deletions(-) >