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[209.132.180.67]) by mx.google.com with ESMTP id e39-v6si8726229plg.366.2018.11.09.13.33.38; Fri, 09 Nov 2018 13:33:55 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727210AbeKJHNz (ORCPT + 99 others); Sat, 10 Nov 2018 02:13:55 -0500 Received: from vmicros1.altlinux.org ([194.107.17.57]:56018 "EHLO vmicros1.altlinux.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725799AbeKJHNz (ORCPT ); Sat, 10 Nov 2018 02:13:55 -0500 Received: from mua.local.altlinux.org (mua.local.altlinux.org [192.168.1.14]) by vmicros1.altlinux.org (Postfix) with ESMTP id 7DE4F72CBF9; Sat, 10 Nov 2018 00:31:28 +0300 (MSK) Received: by mua.local.altlinux.org (Postfix, from userid 508) id 71F117CD1FF; Sat, 10 Nov 2018 00:31:28 +0300 (MSK) Date: Sat, 10 Nov 2018 00:31:28 +0300 From: "Dmitry V. Levin" To: Palmer Dabbelt Cc: Andy Lutomirski , Elvira Khabirova , Albert Ou , Paul Moore , Eric Paris , linux-riscv@lists.infradead.org, linux-audit@redhat.com, linux-kernel@vger.kernel.org Subject: Re: [PATCH 12/13] riscv: define syscall_get_arch() Message-ID: <20181109213128.GA1907@altlinux.org> Mail-Followup-To: Palmer Dabbelt , Andy Lutomirski , Elvira Khabirova , Albert Ou , Paul Moore , Eric Paris , linux-riscv@lists.infradead.org, linux-audit@redhat.com, linux-kernel@vger.kernel.org References: <20181109031712.GL21511@altlinux.org> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="Nq2Wo0NMKNjxTN9z" Content-Disposition: inline In-Reply-To: Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org --Nq2Wo0NMKNjxTN9z Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Fri, Nov 09, 2018 at 10:45:54AM -0800, Palmer Dabbelt wrote: > On Thu, 08 Nov 2018 19:17:13 PST (-0800), ldv@altlinux.org wrote: > > syscall_get_arch() is required to be implemented on all architectures > > that use tracehook_report_syscall_entry() in order to extend > > the generic ptrace API with PTRACE_GET_SYSCALL_INFO request. > > > > Signed-off-by: Dmitry V. Levin > > --- > > arch/riscv/include/asm/syscall.h | 6 ++++++ > > include/uapi/linux/audit.h | 1 + > > 2 files changed, 7 insertions(+) > > > > diff --git a/arch/riscv/include/asm/syscall.h b/arch/riscv/include/asm/= syscall.h > > index 8d25f8904c00..7e1e26ca7317 100644 > > --- a/arch/riscv/include/asm/syscall.h > > +++ b/arch/riscv/include/asm/syscall.h > > @@ -18,6 +18,7 @@ > > #ifndef _ASM_RISCV_SYSCALL_H > > #define _ASM_RISCV_SYSCALL_H > > > > +#include > > #include > > #include > > > > @@ -99,4 +100,9 @@ static inline void syscall_set_arguments(struct task= _struct *task, > > memcpy(®s->a1 + i * sizeof(regs->a1), args, n * sizeof(regs->a0)); > > } > > > > +static inline int syscall_get_arch(void) > > +{ > > + return AUDIT_ARCH_RISCV; > > +} > > + > > #endif /* _ASM_RISCV_SYSCALL_H */ > > diff --git a/include/uapi/linux/audit.h b/include/uapi/linux/audit.h > > index c4c8b131af48..ad4105c602a1 100644 > > --- a/include/uapi/linux/audit.h > > +++ b/include/uapi/linux/audit.h > > @@ -405,6 +405,7 @@ enum { > > /* do not define AUDIT_ARCH_PPCLE since it is not supported by audit */ > > #define AUDIT_ARCH_PPC64 (EM_PPC64|__AUDIT_ARCH_64BIT) > > #define AUDIT_ARCH_PPC64LE (EM_PPC64|__AUDIT_ARCH_64BIT|__AUDIT_ARCH_L= E) > > +#define AUDIT_ARCH_RISCV (EM_RISCV|__AUDIT_ARCH_64BIT) > > #define AUDIT_ARCH_S390 (EM_S390) > > #define AUDIT_ARCH_S390X (EM_S390|__AUDIT_ARCH_64BIT) > > #define AUDIT_ARCH_SH (EM_SH) >=20 > I think this is incorrect: EM_RISCV has 32-bit and 64-bit variants, and i= f I=20 > understand what's going on here this is marking all RISC-V targets as 64-= bit. =20 > Since this is a userspace header, I think the right thing to switch on is= =20 > __riscv_xlen, which will be defined to either 32 or 64 depending on the b= ase=20 > ISA. > We're also little endian. OK, it means we need to introduce two different AUDIT_ARCH_ constants for RISC-V. Do you have any preferences for their names, e.g. AUDIT_ARCH_RISCV and AUDIT_ARCH_RISCV64, or AUDIT_ARCH_RISCV and AUDIT_ARCH_RISCV32, or AUDIT_ARCH_RISCV64 and AUDIT_ARCH_RISCV32, or anything else? --=20 ldv --Nq2Wo0NMKNjxTN9z Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iQIcBAEBCAAGBQJb5fywAAoJEAVFT+BVnCUIr9oQAIvmhFu/M1spBsW47Mz/cNPM ctjzYjvdEmyj5geJofM71utqHzvGI2mRX/Itd4wEzSXUDze6gFhMVjfS7cHr/icB o6uMaj43skYZD5UvCvSW70bQAuStMbp5QldwGk5LhImsm+h3OJ2uwIPNtUEKBj40 oEVQ4eMtGmeawf7cPsKiW21NwgvDqkwCpcqWhyQydGVCXZ2B1jWUdKVRwAIrZXjN TfaIT2t2GIeCyD8NGlYVpPVU5EtwxvXVPHzoe68qhUu7TrPGe18yoVjzOPXZDnqP SGGzqDUlIxzMRL7wgsyHNnuWJHqu3/c+gHWOgGFxhzuTT7cukP7Mi4blML5p4x7b R0HRegHeo4m7wiqnfrO19Kn4CmiX6x110O/waozrzO34CxPVIS7IhOlGEXZbCDsZ pZLRWcjMJw+JUE1MRS3wysWP3ObG2MUCJkb6+PLQ4jTnbmHhq61gT0weNqqVsVPh iPOKJJbgqP7fkkCnfksAtxyWXqdlqXl7OprGfa1N8allogWPs9N+sWdDKPDpX/oK xQapRdY1Htf9E+UxBvrdOJRjHPFr66BJZBeT8lrRmEodmJ+MdIXhNdniWj4Dm5SF in7blMkTLtuJphcZPOzzlkQ8KQBK/aoFaMjdMemaV5Sq0G0LdvVTv+r7bZxjyVlE yQIco4ytuB+gRaGKt8aM =5+xK -----END PGP SIGNATURE----- --Nq2Wo0NMKNjxTN9z--