Received: by 2002:ad5:474a:0:0:0:0:0 with SMTP id i10csp3307000imu; Sun, 11 Nov 2018 12:03:23 -0800 (PST) X-Google-Smtp-Source: AJdET5dYwZg6CsauYQMK1/UD6yMSi4QyvFhRmndqnNWO3FjlpaXYlhozUgsGQ3I3kBV5PX2cWBaD X-Received: by 2002:a63:b54f:: with SMTP id u15mr14890572pgo.420.1541966603093; Sun, 11 Nov 2018 12:03:23 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1541966603; cv=none; d=google.com; s=arc-20160816; b=XB4WJcDO086LMitThQQ0WPA3M7LcWMBJV2s1fnu7WQa61rJk21YqYxa7xzw+beFjkS 1mAS9+hsaYKhloyD97xVBkgmWDaR/QIUcEfqYU8jz4mRlNnszGKao9Q7mrjP72kmArpQ hIrTvTNtggPgy8MukQYfoDGZMITzof+S+LiEfxwrnF6Phuz/eTWHDspAAgZ86/bCNR0m ixuuGBEXvHzRr0rcjZangMkyp424WqkU1XYo2MlVF9FHFhY79F/B//bdXsAgY5rCcC7C 2ClRi5Y8b3/3O0+Rq5jIMfA1CQe8kOQ3iDEjjajU8d0OQLQ2znTZYzeuqIVW8ZpdS+I9 Z1/Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:in-reply-to:subject:message-id:date:cc:to :from:mime-version:content-transfer-encoding:content-disposition; bh=f2B/A3inShVyrXrGT+AhQVdgnCe5Tfhe/pasRzrCb28=; b=n3GQe9yldM80nQHhGzI5fXiuKdHUDPc5Y1HX7pVzPCV/W+ezxilvHMJecyQK3anvg4 xL25q2gp+T9BlPtsmdfgn2RTg5l+PPBOkZ2RiViP7DecjDhXwQk9ZjyXLrFnoZ/JWN/l coVI/SQjk6gx5iJrZgiF5ElAOv0hJt891znt/TAuHQPhb+uLUEDky4Q4beM3FUoWgfFx l7XzecPKE6wiN1aCSZCS1I62sfjhkhfl0JOTJZ1zrAFz82Vzs4HTy45cuBuEnjoP5MTC KnVpSHtRHey4KFSxTd3OnLVxxZUKw2mrC/3PWtgcsIcIRYdUyMsBpbc+vmAvpT57MfP2 hNiQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id 69si14554624pgd.290.2018.11.11.12.03.08; Sun, 11 Nov 2018 12:03:23 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729729AbeKLFuC (ORCPT + 99 others); Mon, 12 Nov 2018 00:50:02 -0500 Received: from shadbolt.e.decadent.org.uk ([88.96.1.126]:51284 "EHLO shadbolt.e.decadent.org.uk" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730809AbeKLFsd (ORCPT ); Mon, 12 Nov 2018 00:48:33 -0500 Received: from [192.168.4.242] (helo=deadeye) by shadbolt.decadent.org.uk with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.89) (envelope-from ) id 1gLvsu-0000oP-Kg; Sun, 11 Nov 2018 19:59:04 +0000 Received: from ben by deadeye with local (Exim 4.91) (envelope-from ) id 1gLvsV-0001fF-9R; Sun, 11 Nov 2018 19:58:39 +0000 Content-Type: text/plain; charset="UTF-8" Content-Disposition: inline Content-Transfer-Encoding: 8bit MIME-Version: 1.0 From: Ben Hutchings To: linux-kernel@vger.kernel.org, stable@vger.kernel.org CC: akpm@linux-foundation.org Date: Sun, 11 Nov 2018 19:49:05 +0000 Message-ID: X-Mailer: LinuxStableQueue (scripts by bwh) Subject: [PATCH 3.16 219/366] x86/cpufeatures: Hide AMD-specific speculation flags In-Reply-To: X-SA-Exim-Connect-IP: 192.168.4.242 X-SA-Exim-Mail-From: ben@decadent.org.uk X-SA-Exim-Scanned: No (on shadbolt.decadent.org.uk); SAEximRunCond expanded to false Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org 3.16.61-rc1 review patch. If anyone has any objections, please let me know. ------------------ From: Ben Hutchings Hide the AMD_{IBRS,IBPB,STIBP} flag from /proc/cpuinfo. This was done upstream as part of commit e7c587da1252 "x86/speculation: Use synthetic bits for IBRS/IBPB/STIBP". I already backported that commit but accidentally dropped this part. Signed-off-by: Ben Hutchings --- --- a/arch/x86/include/asm/cpufeature.h +++ b/arch/x86/include/asm/cpufeature.h @@ -253,9 +253,9 @@ #define X86_FEATURE_SPEC_CTRL_SSBD (10*32+31) /* "" Speculative Store Bypass Disable */ /* AMD-defined CPU features, CPUID level 0x80000008 (EBX), word 11 */ -#define X86_FEATURE_AMD_IBPB (11*32+12) /* Indirect Branch Prediction Barrier */ -#define X86_FEATURE_AMD_IBRS (11*32+14) /* Indirect Branch Restricted Speculation */ -#define X86_FEATURE_AMD_STIBP (11*32+15) /* Single Thread Indirect Branch Predictors */ +#define X86_FEATURE_AMD_IBPB (11*32+12) /* "" Indirect Branch Prediction Barrier */ +#define X86_FEATURE_AMD_IBRS (11*32+14) /* "" Indirect Branch Restricted Speculation */ +#define X86_FEATURE_AMD_STIBP (11*32+15) /* "" Single Thread Indirect Branch Predictors */ #define X86_FEATURE_VIRT_SSBD (11*32+25) /* Virtualized Speculative Store Bypass Disable */ /*