Received: by 2002:ad5:474a:0:0:0:0:0 with SMTP id i10csp3315814imu; Sun, 11 Nov 2018 12:12:21 -0800 (PST) X-Google-Smtp-Source: AJdET5fR6iM9n+6YqXFEN7vTYQkKb8Sx6EYniZW2FU3MG3QaXFyZncUudFwIOlqUXfjDDZUPGg+Y X-Received: by 2002:aa7:818a:: with SMTP id g10-v6mr17359628pfi.153.1541967141910; Sun, 11 Nov 2018 12:12:21 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1541967141; cv=none; d=google.com; s=arc-20160816; b=u3rc2SGojlpgwZHpfzruWq++g+PWtBR91wzgykEMk1d/VDCUPpETmH6q+3QM4mNStQ AMRLL+OaFEC4UwnoO/8LTgRtrpucvV5WP5xVgJKiv0TPCP/oVC6dDvE0a/RrhvWjdbV3 dmlcCF9a/Kt5QI8WucOo0Wl8JLgjTIyq8CLS6gbXFMHbmLIbAmuazV3BJCmAaglV/mnQ 7hcgTx0bNKfyeIMdYjzKQU98ZSdggNgCsY7AGEywwW9jweCdqHe+4hD3pokG60P9BElS ExR6et/A5FOQnvVPE8D0D2vlnu9u+QnTem014vg8DH+gSmokwjrI7W567dgVk++3NYqb rcuw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:in-reply-to:subject:message-id:date:cc:to :from:mime-version:content-transfer-encoding:content-disposition; bh=+/da0J3k6QEECdsFAv8y69EdfdJ9iDKh/G/zQ4Wa2Zw=; b=fUV30wrK9+QeWeKnrNkb0z9hSp/EgJzm1s1ho0GMNi3VQVOS0nLTpEoG7odd544Zua NVzdzCZEhlHHW4cS/Hw1ZjTHWvpJXNr3fkhp/oAQ/gxQqy1AiH+viAk0AeiGOBu/lAQ8 9kzFESxoZ51rO+uwiGr26YzxEz33VH8Xze5Z3rLEwhsKTJ1xtzm/zPBT0EKEIO6xwsl8 KqXSEHS1pwvWYZc424e/6I2Xr8XCVU5ii6zs01FnKC1gOQ4kzEGcRbZvhqxHPjHgt0fD kxYE4YPeCMSsU5EDpsbfcsGpULYMx4rBtwiApdKBaeLgciGn3bkWBjV9YXm9Kc6KPpO5 tR9g== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id 129-v6si16758577pfy.164.2018.11.11.12.12.06; Sun, 11 Nov 2018 12:12:21 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731679AbeKLGAv (ORCPT + 99 others); Mon, 12 Nov 2018 01:00:51 -0500 Received: from shadbolt.e.decadent.org.uk ([88.96.1.126]:52476 "EHLO shadbolt.e.decadent.org.uk" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730938AbeKLGAv (ORCPT ); Mon, 12 Nov 2018 01:00:51 -0500 Received: from [192.168.4.242] (helo=deadeye) by shadbolt.decadent.org.uk with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.89) (envelope-from ) id 1gLvt3-0000lJ-D2; Sun, 11 Nov 2018 19:59:13 +0000 Received: from ben by deadeye with local (Exim 4.91) (envelope-from ) id 1gLvsR-0001Wf-Hl; Sun, 11 Nov 2018 19:58:35 +0000 Content-Type: text/plain; charset="UTF-8" Content-Disposition: inline Content-Transfer-Encoding: 8bit MIME-Version: 1.0 From: Ben Hutchings To: linux-kernel@vger.kernel.org, stable@vger.kernel.org CC: akpm@linux-foundation.org, "Rafael J . Wysocki" , "Hans de Goede" , "Thierry Reding" Date: Sun, 11 Nov 2018 19:49:05 +0000 Message-ID: X-Mailer: LinuxStableQueue (scripts by bwh) Subject: [PATCH 3.16 122/366] ACPI / LPSS: Add missing prv_offset setting for byt/cht PWM devices In-Reply-To: X-SA-Exim-Connect-IP: 192.168.4.242 X-SA-Exim-Mail-From: ben@decadent.org.uk X-SA-Exim-Scanned: No (on shadbolt.decadent.org.uk); SAEximRunCond expanded to false Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org 3.16.61-rc1 review patch. If anyone has any objections, please let me know. ------------------ From: Hans de Goede commit fdcb613d49321b5bf5d5a1bd0fba8e7c241dcc70 upstream. The LPSS PWM device on on Bay Trail and Cherry Trail devices has a set of private registers at offset 0x800, the current lpss_device_desc for them already sets the LPSS_SAVE_CTX flag to have these saved/restored over device-suspend, but the current lpss_device_desc was not setting the prv_offset field, leading to the regular device registers getting saved/restored instead. This is causing the PWM controller to no longer work, resulting in a black screen, after a suspend/resume on systems where the firmware clears the APB clock and reset bits at offset 0x804. This commit fixes this by properly setting prv_offset to 0x800 for the PWM devices. Fixes: e1c748179754 ("ACPI / LPSS: Add Intel BayTrail ACPI mode PWM") Fixes: 1bfbd8eb8a7f ("ACPI / LPSS: Add ACPI IDs for Intel Braswell") Signed-off-by: Hans de Goede Acked-by: Rafael J . Wysocki Signed-off-by: Thierry Reding [bwh: Backported to 3.16: - Drop changes for Braswell - Adjust context] Signed-off-by: Ben Hutchings --- --- a/drivers/acpi/acpi_lpss.c +++ b/drivers/acpi/acpi_lpss.c @@ -150,6 +150,7 @@ static struct lpss_shared_clock pwm_cloc static struct lpss_device_desc byt_pwm_dev_desc = { .clk_required = true, + .prv_offset = 0x800, .save_ctx = true, .shared_clock = &pwm_clock, };