Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67;
From:   Lubomir Rintel <lkundrak@v3.sk>
To:     Eric Miao <eric.y.miao@gmail.com>,
        Haojian Zhuang <haojian.zhuang@gmail.com>
Cc:     linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org,
        Russell King <linux@armlinux.org.uk>,
        Robert Jarzmik <robert.jarzmik@free.fr>,
        Lubomir Rintel <lkundrak@v3.sk>
Subject: [PATCH v3 07/18] DT: marvell,mmp2: add more TWSI controllers
Date:   Mon, 12 Nov 2018 04:20:16 +0100
Message-Id: <20181112032027.653931-8-lkundrak@v3.sk>
In-Reply-To: <20181112032027.653931-1-lkundrak@v3.sk>
References: <20181112032027.653931-1-lkundrak@v3.sk>
MIME-Version: 1.0
Content-Transfer-Encoding: quoted-printable
Sender: linux-kernel-owner@vger.kernel.org
Precedence: bulk

I've gotten the base addresses, clocks and interrupts from an rusty and o=
ld
out-of-tree driver. I haven't actually checked against the datasheet, sin=
ce
that one is reserved for the Marvell inner circle.

Tested with an accelerometer on TWSI6 on an OLPC XO 1.75 machine.

Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Acked-by: Pavel Machek <pavel@ucw.cz>
---
 arch/arm/boot/dts/mmp2.dtsi | 49 +++++++++++++++++++++++++++++++++++++
 1 file changed, 49 insertions(+)

diff --git a/arch/arm/boot/dts/mmp2.dtsi b/arch/arm/boot/dts/mmp2.dtsi
index 63d49abf4e92..7549680ab2e3 100644
--- a/arch/arm/boot/dts/mmp2.dtsi
+++ b/arch/arm/boot/dts/mmp2.dtsi
@@ -269,6 +269,55 @@
 				status =3D "disabled";
 			};
=20
+			twsi3: i2c@d4032000 {
+				compatible =3D "mrvl,mmp-twsi";
+				reg =3D <0xd4032000 0x1000>;
+				interrupt-parent =3D <&intcmux17>;
+				interrupts =3D <1>;
+				clocks =3D <&soc_clocks MMP2_CLK_TWSI2>;
+				resets =3D <&soc_clocks MMP2_CLK_TWSI2>;
+				#address-cells =3D <1>;
+				#size-cells =3D <0>;
+				status =3D "disabled";
+			};
+
+			twsi4: i2c@d4033000 {
+				compatible =3D "mrvl,mmp-twsi";
+				reg =3D <0xd4033000 0x1000>;
+				interrupt-parent =3D <&intcmux17>;
+				interrupts =3D <2>;
+				clocks =3D <&soc_clocks MMP2_CLK_TWSI3>;
+				resets =3D <&soc_clocks MMP2_CLK_TWSI3>;
+				#address-cells =3D <1>;
+				#size-cells =3D <0>;
+				status =3D "disabled";
+			};
+
+
+			twsi5: i2c@d4033800 {
+				compatible =3D "mrvl,mmp-twsi";
+				reg =3D <0xd4033800 0x1000>;
+				interrupt-parent =3D <&intcmux17>;
+				interrupts =3D <3>;
+				clocks =3D <&soc_clocks MMP2_CLK_TWSI4>;
+				resets =3D <&soc_clocks MMP2_CLK_TWSI4>;
+				#address-cells =3D <1>;
+				#size-cells =3D <0>;
+				status =3D "disabled";
+			};
+
+			twsi6: i2c@d4034000 {
+				compatible =3D "mrvl,mmp-twsi";
+				reg =3D <0xd4034000 0x1000>;
+				interrupt-parent =3D <&intcmux17>;
+				interrupts =3D <4>;
+				clocks =3D <&soc_clocks MMP2_CLK_TWSI5>;
+				resets =3D <&soc_clocks MMP2_CLK_TWSI5>;
+				#address-cells =3D <1>;
+				#size-cells =3D <0>;
+				status =3D "disabled";
+			};
+
 			rtc: rtc@d4010000 {
 				compatible =3D "mrvl,mmp-rtc";
 				reg =3D <0xd4010000 0x1000>;
--=20
2.19.1