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[209.132.180.67]) by mx.google.com with ESMTP id x9si16232272pge.76.2018.11.11.20.48.19; Sun, 11 Nov 2018 20:48:34 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731356AbeKLOjD (ORCPT + 99 others); Mon, 12 Nov 2018 09:39:03 -0500 Received: from kvm5.telegraphics.com.au ([98.124.60.144]:48682 "EHLO kvm5.telegraphics.com.au" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730827AbeKLOiX (ORCPT ); Mon, 12 Nov 2018 09:38:23 -0500 Received: by kvm5.telegraphics.com.au (Postfix, from userid 502) id 293A8297ED; Sun, 11 Nov 2018 23:46:56 -0500 (EST) To: Geert Uytterhoeven Cc: Arnd Bergmann , Stephen N Chivers , Thomas Gleixner , Daniel Lezcano , John Stultz , linux-m68k@lists.linux-m68k.org, linux-kernel@vger.kernel.org, Philip Blundell Message-Id: <6fd1919c60b88c0383be6d3555190a6411ebe2d4.1541995959.git.fthain@telegraphics.com.au> In-Reply-To: References: From: Finn Thain Subject: [RFC PATCH 10/13] m68k: hp300: Convert to clocksource API Date: Mon, 12 Nov 2018 15:12:39 +1100 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add a platform clocksource by adapting the existing arch_gettimeoffset implementation. Cc: Philip Blundell Signed-off-by: Finn Thain --- arch/m68k/hp300/time.c | 33 ++++++++++++++++++++++++++++----- 1 file changed, 28 insertions(+), 5 deletions(-) diff --git a/arch/m68k/hp300/time.c b/arch/m68k/hp300/time.c index 5cf711fd0858..ff2fc65bc5e7 100644 --- a/arch/m68k/hp300/time.c +++ b/arch/m68k/hp300/time.c @@ -8,6 +8,7 @@ */ #include +#include #include #include #include @@ -19,6 +20,18 @@ #include #include +static u64 hp300_read_clk(struct clocksource *cs); + +static struct clocksource hp300_clk = { + .name = "timer", + .rating = 250, + .read = hp300_read_clk, + .mask = CLOCKSOURCE_MASK(32), + .flags = CLOCK_SOURCE_IS_CONTINUOUS, +}; + +static u32 clk_total; + /* Clock hardware definitions */ #define CLOCKBASE 0xf05f8000 @@ -32,22 +45,29 @@ #define CLKMSB3 0xD /* This is for machines which generate the exact clock. */ -#define USECS_PER_JIFFY (1000000/HZ) -#define INTVAL ((10000 / 4) - 1) +#define HP300_TIMER_CLOCK_FREQ 250000 +#define HP300_TIMER_CYCLES (HP300_TIMER_CLOCK_FREQ / HZ) +#define INTVAL (HP300_TIMER_CYCLES - 1) static irqreturn_t hp300_tick(int irq, void *dev_id) { + unsigned long flags; unsigned long tmp; irq_handler_t vector = dev_id; + + local_irq_save(flags); in_8(CLOCKBASE + CLKSR); asm volatile ("movpw %1@(5),%0" : "=d" (tmp) : "a" (CLOCKBASE)); + clk_total += INTVAL; + local_irq_restore(flags); + /* Turn off the network and SCSI leds */ blinken_leds(0, 0xe0); return vector(irq, NULL); } -u32 hp300_gettimeoffset(void) +static u64 hp300_read_clk(struct clocksource *cs) { unsigned long flags; unsigned char lsb, msb1, msb2; @@ -66,7 +86,8 @@ u32 hp300_gettimeoffset(void) local_irq_restore(flags); ticks = INTVAL - ((msb2 << 8) | lsb); - return ((USECS_PER_JIFFY * ticks) / INTVAL) * 1000; + + return clk_total + ticks; } void __init hp300_sched_init(irq_handler_t vector) @@ -76,9 +97,11 @@ void __init hp300_sched_init(irq_handler_t vector) asm volatile(" movpw %0,%1@(5)" : : "d" (INTVAL), "a" (CLOCKBASE)); - if (request_irq(IRQ_AUTO_6, hp300_tick, 0, "timer tick", vector)) + if (request_irq(IRQ_AUTO_6, hp300_tick, IRQF_TIMER, "timer tick", vector)) pr_err("Couldn't register timer interrupt\n"); out_8(CLOCKBASE + CLKCR2, 0x1); /* select CR1 */ out_8(CLOCKBASE + CLKCR1, 0x40); /* enable irq */ + + clocksource_register_hz(&hp300_clk, HP300_TIMER_CLOCK_FREQ); } -- 2.18.1