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From:   Jiaying Liang <jliang@xilinx.com>
To:     Jiaying Liang <jliang@xilinx.com>,
        "jassisinghbrar@gmail.com" <jassisinghbrar@gmail.com>,
        Michal Simek <michals@xilinx.com>,
        "robh+dt@kernel.org" <robh+dt@kernel.org>,
        "mark.rutland@arm.com" <mark.rutland@arm.com>
CC:     "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
        "linux-arm-kernel@lists.infradead.org" 
        <linux-arm-kernel@lists.infradead.org>,
        "devicetree@vger.kernel.org" <devicetree@vger.kernel.org>
Subject: RE: [PATCH v5 2/2] dt-bindings: mailbox: Add Xilinx IPI Mailbox
Thread-Topic: [PATCH v5 2/2] dt-bindings: mailbox: Add Xilinx IPI Mailbox
Thread-Index: AQHUdVgcP3DYeMM1mUmtiv85ca0+nKVMbhjg
Date:   Mon, 12 Nov 2018 17:23:44 +0000
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Ping, any comments?
Thanks,
Wendy

> -----Original Message-----
> From: Wendy Liang [mailto:wendy.liang@xilinx.com]
> Sent: Monday, November 05, 2018 2:37 PM
> To: jassisinghbrar@gmail.com; Michal Simek <michals@xilinx.com>;
> robh+dt@kernel.org; mark.rutland@arm.com
> Cc: linux-kernel@vger.kernel.org; linux-arm-kernel@lists.infradead.org;
> devicetree@vger.kernel.org; Jiaying Liang <jliang@xilinx.com>
> Subject: [PATCH v5 2/2] dt-bindings: mailbox: Add Xilinx IPI Mailbox
>=20
> Xilinx ZynqMP IPI(Inter Processor Interrupt) is a hardware block in ZynqM=
P
> SoC used for the communication between various processor systems.
>=20
> Signed-off-by: Wendy Liang <wendy.liang@xilinx.com>
> ---
>  .../bindings/mailbox/xlnx,zynqmp-ipi-mailbox.txt   | 128
> +++++++++++++++++++++
>  1 file changed, 128 insertions(+)
>  create mode 100644
> Documentation/devicetree/bindings/mailbox/xlnx,zynqmp-ipi-mailbox.txt
>=20
> diff --git a/Documentation/devicetree/bindings/mailbox/xlnx,zynqmp-ipi-
> mailbox.txt b/Documentation/devicetree/bindings/mailbox/xlnx,zynqmp-ipi-
> mailbox.txt
> new file mode 100644
> index 0000000..18fd7b4
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/mailbox/xlnx,zynqmp-ipi-mailbox.
> +++ txt
> @@ -0,0 +1,128 @@
> +Xilinx IPI Mailbox Controller
> +=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
> +
> +The Xilinx IPI(Inter Processor Interrupt) mailbox controller is to
> +manage messaging between two Xilinx Zynq UltraScale+ MPSoC IPI agents.
> +Each IPI agent owns registers used for notification and buffers for mess=
age.
> +
> +               +-------------------------------------+
> +               | Xilinx ZynqMP IPI Controller        |
> +               +-------------------------------------+
> +    +--------------------------------------------------+
> +ATF                    |                     |
> +                       |                     |
> +                       |                     |
> +    +--------------------------+             |
> +                       |                     |
> +                       |                     |
> +    +--------------------------------------------------+
> +            +------------------------------------------+
> +            |  +----------------+   +----------------+ |
> +Hardware    |  |  IPI Agent     |   |  IPI Buffers   | |
> +            |  |  Registers     |   |                | |
> +            |  |                |   |                | |
> +            |  +----------------+   +----------------+ |
> +            |                                          |
> +            | Xilinx IPI Agent Block                   |
> +            +------------------------------------------+
> +
> +
> +Controller Device Node:
> +=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D
> +Required properties:
> +--------------------
> +IPI agent node:
> +- compatible:		Shall be: "xlnx,zynqmp-ipi-mailbox"
> +- interrupt-parent:	Phandle for the interrupt controller
> +- interrupts:		Interrupt information corresponding to the
> +			interrupt-names property.
> +- xlnx,ipi-id:		local Xilinx IPI agent ID
> +- #address-cells:	number of address cells of internal IPI mailbox nodes
> +- #size-cells:		number of size cells of internal IPI mailbox nodes
> +
> +Internal IPI mailbox node:
> +- reg:			IPI buffers address ranges
> +- reg-names:		Names of the reg resources. It should have:
> +			* local_request_region
> +			  - IPI request msg buffer written by local and read
> +			    by remote
> +			* local_response_region
> +			  - IPI response msg buffer written by local and read
> +			    by remote
> +			* remote_request_region
> +			  - IPI request msg buffer written by remote and read
> +			    by local
> +			* remote_response_region
> +			  - IPI response msg buffer written by remote and
> read
> +			    by local
> +- #mbox-cells:		Shall be 1. It contains:
> +			* tx(0) or rx(1) channel
> +- xlnx,ipi-id:		remote Xilinx IPI agent ID of which the mailbox is
> +			connected to.
> +
> +Optional properties:
> +--------------------
> +- method:              The method of accessing the IPI agent registers.
> +                       Permitted values are: "smc" and "hvc". Default is
> +                       "smc".
> +
> +Client Device Node:
> +=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D
> +Required properties:
> +--------------------
> +- mboxes:		Standard property to specify a mailbox
> +			(See ./mailbox.txt)
> +- mbox-names:		List of identifier  strings for each mailbox
> +			channel.
> +
> +Example:
> +=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D
> +	zynqmp_ipi {
> +		compatible =3D "xlnx,zynqmp-ipi-mailbox";
> +		interrupt-parent =3D <&gic>;
> +		interrupts =3D <0 29 4>;
> +		xlnx,ipi-id =3D <0>;
> +		#address-cells =3D <1>;
> +		#size-cells =3D <1>;
> +
> +		/* APU<->RPU0 IPI mailbox controller */
> +		ipi_mailbox_rpu0: mailbox@ff90400 {
> +			compatible =3D "xlnx,zynqmp-ipi-mailbox";
> +			reg =3D <0xff990400 0x20>,
> +			      <0xff990420 0x20>,
> +			      <0xff990080 0x20>,
> +			      <0xff9900a0 0x20>;
> +			reg-names =3D "local_request_region",
> +				    "local_response_region",
> +				    "remote_request_region",
> +				    "remote_response_region";
> +			#mbox-cells =3D <1>;
> +			xlnx,ipi-id =3D <1>;
> +		};
> +		/* APU<->RPU1 IPI mailbox controller */
> +		ipi_mailbox_rpu1: mailbox@ff990440 {
> +			compatible =3D "xlnx,zynqmp-ipi-mailbox";
> +			reg =3D <0xff990440 0x20>,
> +			      <0xff990460 0x20>,
> +			      <0xff990280 0x20>,
> +			      <0xff9902a0 0x20>;
> +			reg-names =3D "local_request_region",
> +				    "local_response_region",
> +				    "remote_request_region",
> +				    "remote_response_region";
> +			#mbox-cells =3D <1>;
> +			xlnx,ipi-id =3D <2>;
> +		};
> +	};
> +	rpu0 {
> +		...
> +		mboxes =3D <&ipi_mailbox_rpu0 0>,
> +			 <&ipi_mailbox_rpu0 1>;
> +		mbox-names =3D "tx", "rx";
> +	};
> +	rpu1 {
> +		...
> +		mboxes =3D <&ipi_mailbox_rpu1 0>,
> +			 <&ipi_mailbox_rpu1 1>;
> +		mbox-names =3D "tx", "rx";
> +	};
> --
> 2.7.4